diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2323-drm-amdgpu-mes10.1-load-mes-firmware-file-to-CPU-buf.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2323-drm-amdgpu-mes10.1-load-mes-firmware-file-to-CPU-buf.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2323-drm-amdgpu-mes10.1-load-mes-firmware-file-to-CPU-buf.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2323-drm-amdgpu-mes10.1-load-mes-firmware-file-to-CPU-buf.patch new file mode 100644 index 00000000..2241ec44 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2323-drm-amdgpu-mes10.1-load-mes-firmware-file-to-CPU-buf.patch @@ -0,0 +1,79 @@ +From 7a2628f183b4fa2b5acd0c737687a71b2ff0976f Mon Sep 17 00:00:00 2001 +From: Jack Xiao <Jack.Xiao@amd.com> +Date: Mon, 15 Apr 2019 11:31:04 +0800 +Subject: [PATCH 2323/2940] drm/amdgpu/mes10.1: load mes firmware file to CPU + buffer + +It requests MES firmware binary and uploads to CPU buffer. + +Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 43 ++++++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c +index 2e655736b24d..c799b0ca1907 100644 +--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c ++++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c +@@ -23,6 +23,8 @@ + + #include "amdgpu.h" + ++MODULE_FIRMWARE("amdgpu/navi10_mes.bin"); ++ + static int mes_v10_1_add_hw_queue(struct amdgpu_mes *mes, + struct mes_add_queue_input *input) + { +@@ -54,6 +56,47 @@ static const struct amdgpu_mes_funcs mes_v10_1_funcs = { + .resume_gang = mes_v10_1_resume_gang, + }; + ++static int mes_v10_1_init_microcode(struct amdgpu_device *adev) ++{ ++ const char *chip_name; ++ char fw_name[30]; ++ int err; ++ const struct mes_firmware_header_v1_0 *mes_hdr; ++ ++ switch (adev->asic_type) { ++ case CHIP_NAVI10: ++ chip_name = "navi10"; ++ break; ++ default: ++ BUG(); ++ } ++ ++ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mes.bin", chip_name); ++ err = request_firmware(&adev->mes.fw, fw_name, adev->dev); ++ if (err) ++ return err; ++ ++ err = amdgpu_ucode_validate(adev->mes.fw); ++ if (err) { ++ release_firmware(adev->mes.fw); ++ adev->mes.fw = NULL; ++ return err; ++ } ++ ++ mes_hdr = (const struct mes_firmware_header_v1_0 *)adev->mes.fw->data; ++ adev->mes.ucode_fw_version = le32_to_cpu(mes_hdr->mes_ucode_version); ++ adev->mes.ucode_fw_version = ++ le32_to_cpu(mes_hdr->mes_ucode_data_version); ++ adev->mes.uc_start_addr = ++ le32_to_cpu(mes_hdr->mes_uc_start_addr_lo) | ++ ((uint64_t)(le32_to_cpu(mes_hdr->mes_uc_start_addr_hi)) << 32); ++ adev->mes.data_start_addr = ++ le32_to_cpu(mes_hdr->mes_data_start_addr_lo) | ++ ((uint64_t)(le32_to_cpu(mes_hdr->mes_data_start_addr_hi)) << 32); ++ ++ return 0; ++} ++ + static int mes_v10_1_sw_init(void *handle) + { + return 0; +-- +2.17.1 + |