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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2253-drm-amdgpu-update-golden-setting-programming-logic.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2253-drm-amdgpu-update-golden-setting-programming-logic.patch48
1 files changed, 48 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2253-drm-amdgpu-update-golden-setting-programming-logic.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2253-drm-amdgpu-update-golden-setting-programming-logic.patch
new file mode 100644
index 00000000..fb17871f
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2253-drm-amdgpu-update-golden-setting-programming-logic.patch
@@ -0,0 +1,48 @@
+From a04296b451fe2f4d25026093a431003465d45009 Mon Sep 17 00:00:00 2001
+From: Hawking Zhang <Hawking.Zhang@amd.com>
+Date: Fri, 8 Jun 2018 18:10:57 +0800
+Subject: [PATCH 2253/2940] drm/amdgpu: update golden setting programming logic
+
+Since from soc15, make sure only AndMasked bit get changed
+when applied or_mask
+
+Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Reviewed-by: Le Ma <Le.Ma@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 ++++-
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
+ 2 files changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index b64c00205cc2..ae40f4c35325 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -508,7 +508,10 @@ void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
+ } else {
+ tmp = RREG32(reg);
+ tmp &= ~and_mask;
+- tmp |= or_mask;
++ if (adev->family >= AMDGPU_FAMILY_AI)
++ tmp |= (or_mask & and_mask);
++ else
++ tmp |= or_mask;
+ }
+ WREG32(reg, tmp);
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
+index fa2e2b1e5717..be4d88ce4e74 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -378,7 +378,7 @@ void soc15_program_register_sequence(struct amdgpu_device *adev,
+ } else {
+ tmp = RREG32(reg);
+ tmp &= ~(entry->and_mask);
+- tmp |= entry->or_mask;
++ tmp |= (entry->or_mask & entry->and_mask);
+ }
+
+ if (reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3) ||
+--
+2.17.1
+