diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2179-drm-amd-gmc9-rename-AMDGPU_PTE_MTYPE-to-AMDGPU_PTE_M.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2179-drm-amd-gmc9-rename-AMDGPU_PTE_MTYPE-to-AMDGPU_PTE_M.patch | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2179-drm-amd-gmc9-rename-AMDGPU_PTE_MTYPE-to-AMDGPU_PTE_M.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2179-drm-amd-gmc9-rename-AMDGPU_PTE_MTYPE-to-AMDGPU_PTE_M.patch new file mode 100644 index 00000000..20e6f0ed --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2179-drm-amd-gmc9-rename-AMDGPU_PTE_MTYPE-to-AMDGPU_PTE_M.patch @@ -0,0 +1,121 @@ +From 5eb8a17026b20115b73faeb9ae0c1943308d516c Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Mon, 25 Jun 2018 21:03:40 +0800 +Subject: [PATCH 2179/2940] drm/amd/gmc9: rename AMDGPU_PTE_MTYPE to + AMDGPU_PTE_MTYPE_VG10 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +To differentiate the mtypes across asics. + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 6 +++--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++------- + 4 files changed, 14 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +index aaa364a6e2f9..386edf718103 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +@@ -1113,8 +1113,8 @@ int amdgpu_ttm_gart_bind(struct amdgpu_device *adev, + goto gart_bind_fail; + + /* Patch mtype of the second part BO */ +- flags &= ~AMDGPU_PTE_MTYPE_MASK; +- flags |= AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_NC); ++ flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK; ++ flags |= AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_NC); + + r = amdgpu_gart_bind(adev, + gtt->offset + (page_idx << PAGE_SHIFT), +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 79d20453ff99..d634a2e024f9 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1544,8 +1544,8 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, + flags &= ~AMDGPU_PTE_MTYPE_NV10_MASK; + flags |= (mapping->flags & AMDGPU_PTE_MTYPE_NV10_MASK); + } else { +- flags &= ~AMDGPU_PTE_MTYPE_MASK; +- flags |= (mapping->flags & AMDGPU_PTE_MTYPE_MASK); ++ flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK; ++ flags |= (mapping->flags & AMDGPU_PTE_MTYPE_VG10_MASK); + } + + if ((mapping->flags & AMDGPU_PTE_PRT) && +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +index f2dedc6860c9..a4cdba16c1b8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +@@ -75,8 +75,8 @@ struct amdgpu_bo_list_entry; + + + /* For GFX9 */ +-#define AMDGPU_PTE_MTYPE(a) ((uint64_t)(a) << 57) +-#define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL) ++#define AMDGPU_PTE_MTYPE_VG10(a) ((uint64_t)(a) << 57) ++#define AMDGPU_PTE_MTYPE_VG10_MASK AMDGPU_PTE_MTYPE_VG10(3ULL) + + #define AMDGPU_MTYPE_NC 0 + #define AMDGPU_MTYPE_CC 2 +@@ -86,7 +86,7 @@ struct amdgpu_bo_list_entry; + | AMDGPU_PTE_EXECUTABLE \ + | AMDGPU_PTE_READABLE \ + | AMDGPU_PTE_WRITEABLE \ +- | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC)) ++ | AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_CC)) + + /* NAVI10 only */ + #define AMDGPU_PTE_MTYPE_NV10(a) ((uint64_t)(a) << 48) +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index b8677f48ab14..553cc12ab2c1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -527,22 +527,22 @@ static uint64_t gmc_v9_0_get_vm_pte_flags(struct amdgpu_device *adev, + + switch (flags & AMDGPU_VM_MTYPE_MASK) { + case AMDGPU_VM_MTYPE_DEFAULT: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_NC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_NC); + break; + case AMDGPU_VM_MTYPE_NC: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_NC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_NC); + break; + case AMDGPU_VM_MTYPE_WC: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_WC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_WC); + break; + case AMDGPU_VM_MTYPE_CC: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_CC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_CC); + break; + case AMDGPU_VM_MTYPE_UC: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_UC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_UC); + break; + default: +- pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_NC); ++ pte_flag |= AMDGPU_PTE_MTYPE_VG10(MTYPE_NC); + break; + } + +@@ -908,7 +908,7 @@ static int gmc_v9_0_gart_init(struct amdgpu_device *adev) + if (r) + return r; + adev->gart.table_size = adev->gart.num_gpu_pages * 8; +- adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE(MTYPE_UC) | ++ adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) | + AMDGPU_PTE_EXECUTABLE; + return amdgpu_gart_table_vram_alloc(adev); + } +-- +2.17.1 + |