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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2165-drm-amdgpu-add-helper-function-for-gfx-queue-bitmap-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2165-drm-amdgpu-add-helper-function-for-gfx-queue-bitmap-.patch223
1 files changed, 223 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2165-drm-amdgpu-add-helper-function-for-gfx-queue-bitmap-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2165-drm-amdgpu-add-helper-function-for-gfx-queue-bitmap-.patch
new file mode 100644
index 00000000..3ef8becd
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/2165-drm-amdgpu-add-helper-function-for-gfx-queue-bitmap-.patch
@@ -0,0 +1,223 @@
+From 031edd5b45c20c83c80ecaf4307b430ad6be064c Mon Sep 17 00:00:00 2001
+From: Hawking Zhang <Hawking.Zhang@amd.com>
+Date: Tue, 31 Jul 2018 15:43:10 +0800
+Subject: [PATCH 2165/2940] drm/amdgpu: add helper function for gfx
+ queue/bitmap transition
+
+Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Reviewed-by: Jack Xiao <jack.xiao@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 42 ++++++++++++++++++----
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 14 +++++---
+ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 18 +++++-----
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 18 +++++-----
+ 5 files changed, 65 insertions(+), 29 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+index 9616cd68fdc5..b048b0cb4731 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+@@ -167,7 +167,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
+
+ /* remove the KIQ bit as well */
+ if (adev->gfx.kiq.ring.sched.ready)
+- clear_bit(amdgpu_gfx_queue_to_bit(adev,
++ clear_bit(amdgpu_gfx_mec_queue_to_bit(adev,
+ adev->gfx.kiq.ring.me - 1,
+ adev->gfx.kiq.ring.pipe,
+ adev->gfx.kiq.ring.queue),
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+index 855eff834e2a..827eb53c9649 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+@@ -34,8 +34,8 @@
+ * GPU GFX IP block helpers function.
+ */
+
+-int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec,
+- int pipe, int queue)
++int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
++ int pipe, int queue)
+ {
+ int bit = 0;
+
+@@ -47,8 +47,8 @@ int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec,
+ return bit;
+ }
+
+-void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,
+- int *mec, int *pipe, int *queue)
++void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
++ int *mec, int *pipe, int *queue)
+ {
+ *queue = bit % adev->gfx.mec.num_queue_per_pipe;
+ *pipe = (bit / adev->gfx.mec.num_queue_per_pipe)
+@@ -61,10 +61,40 @@ void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,
+ bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev,
+ int mec, int pipe, int queue)
+ {
+- return test_bit(amdgpu_gfx_queue_to_bit(adev, mec, pipe, queue),
++ return test_bit(amdgpu_gfx_mec_queue_to_bit(adev, mec, pipe, queue),
+ adev->gfx.mec.queue_bitmap);
+ }
+
++int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev,
++ int me, int pipe, int queue)
++{
++ int bit = 0;
++
++ bit += me * adev->gfx.me.num_pipe_per_me
++ * adev->gfx.me.num_queue_per_pipe;
++ bit += pipe * adev->gfx.me.num_queue_per_pipe;
++ bit += queue;
++
++ return bit;
++}
++
++void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,
++ int *me, int *pipe, int *queue)
++{
++ *queue = bit % adev->gfx.me.num_queue_per_pipe;
++ *pipe = (bit / adev->gfx.me.num_queue_per_pipe)
++ % adev->gfx.me.num_pipe_per_me;
++ *me = (bit / adev->gfx.me.num_queue_per_pipe)
++ / adev->gfx.me.num_pipe_per_me;
++}
++
++bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev,
++ int me, int pipe, int queue)
++{
++ return test_bit(amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue),
++ adev->gfx.me.queue_bitmap);
++}
++
+ /**
+ * amdgpu_gfx_scratch_get - Allocate a scratch register
+ *
+@@ -237,7 +267,7 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
+ if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))
+ continue;
+
+- amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
++ amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
+
+ /*
+ * 1. Using pipes 2/3 from MEC 2 seems cause problems.
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+index 1c5d12eae5a6..ce543bb969ad 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+@@ -337,12 +337,18 @@ void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev);
+ void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev);
+ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev);
+
+-int amdgpu_gfx_queue_to_bit(struct amdgpu_device *adev, int mec,
+- int pipe, int queue);
+-void amdgpu_gfx_bit_to_queue(struct amdgpu_device *adev, int bit,
+- int *mec, int *pipe, int *queue);
++int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
++ int pipe, int queue);
++void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
++ int *mec, int *pipe, int *queue);
+ bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,
+ int pipe, int queue);
++int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, int me,
++ int pipe, int queue);
++void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,
++ int *me, int *pipe, int *queue);
++bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,
++ int pipe, int queue);
+ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
+
+ #endif
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+index 5a2bd2870c3d..e117b22501ef 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+@@ -6212,7 +6212,7 @@ static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev,
+ struct amdgpu_ring *iring;
+
+ mutex_lock(&adev->gfx.pipe_reserve_mutex);
+- pipe = amdgpu_gfx_queue_to_bit(adev, ring->me, ring->pipe, 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0);
+ if (acquire)
+ set_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ else
+@@ -6231,20 +6231,20 @@ static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev,
+ /* Lower all pipes without a current reservation */
+ for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {
+ iring = &adev->gfx.gfx_ring[i];
+- pipe = amdgpu_gfx_queue_to_bit(adev,
+- iring->me,
+- iring->pipe,
+- 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev,
++ iring->me,
++ iring->pipe,
++ 0);
+ reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ gfx_v8_0_ring_set_pipe_percent(iring, reserve);
+ }
+
+ for (i = 0; i < adev->gfx.num_compute_rings; ++i) {
+ iring = &adev->gfx.compute_ring[i];
+- pipe = amdgpu_gfx_queue_to_bit(adev,
+- iring->me,
+- iring->pipe,
+- 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev,
++ iring->me,
++ iring->pipe,
++ 0);
+ reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ gfx_v8_0_ring_set_pipe_percent(iring, reserve);
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index 57bdb9c254d1..d5784db65785 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -4582,7 +4582,7 @@ static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev,
+ struct amdgpu_ring *iring;
+
+ mutex_lock(&adev->gfx.pipe_reserve_mutex);
+- pipe = amdgpu_gfx_queue_to_bit(adev, ring->me, ring->pipe, 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0);
+ if (acquire)
+ set_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ else
+@@ -4601,20 +4601,20 @@ static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev,
+ /* Lower all pipes without a current reservation */
+ for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {
+ iring = &adev->gfx.gfx_ring[i];
+- pipe = amdgpu_gfx_queue_to_bit(adev,
+- iring->me,
+- iring->pipe,
+- 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev,
++ iring->me,
++ iring->pipe,
++ 0);
+ reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ gfx_v9_0_ring_set_pipe_percent(iring, reserve);
+ }
+
+ for (i = 0; i < adev->gfx.num_compute_rings; ++i) {
+ iring = &adev->gfx.compute_ring[i];
+- pipe = amdgpu_gfx_queue_to_bit(adev,
+- iring->me,
+- iring->pipe,
+- 0);
++ pipe = amdgpu_gfx_mec_queue_to_bit(adev,
++ iring->me,
++ iring->pipe,
++ 0);
+ reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap);
+ gfx_v9_0_ring_set_pipe_percent(iring, reserve);
+ }
+--
+2.17.1
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-01 01:39:48 +0000