diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1950-drm-amdgpu-sriov-Need-to-initialize-the-HDP_NONSURFA.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1950-drm-amdgpu-sriov-Need-to-initialize-the-HDP_NONSURFA.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1950-drm-amdgpu-sriov-Need-to-initialize-the-HDP_NONSURFA.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1950-drm-amdgpu-sriov-Need-to-initialize-the-HDP_NONSURFA.patch new file mode 100644 index 00000000..35d14865 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1950-drm-amdgpu-sriov-Need-to-initialize-the-HDP_NONSURFA.patch @@ -0,0 +1,39 @@ +From cc0b0102edf48e624de91840d8ab6ffccf21cbf4 Mon Sep 17 00:00:00 2001 +From: Tiecheng Zhou <Tiecheng.Zhou@amd.com> +Date: Tue, 14 May 2019 10:03:35 +0800 +Subject: [PATCH 1950/2940] drm/amdgpu/sriov: Need to initialize the + HDP_NONSURFACE_BAStE +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +it requires to initialize HDP_NONSURFACE_BASE, so as to avoid +using the value left by a previous VM under sriov scenario. + +v2: it should not hurt baremetal, generalize it for both sriov +and baremetal + +Signed-off-by: Emily Deng <Emily.Deng@amd.com> +Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 89b482bc9e58..8b5ddf6c673d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -1177,6 +1177,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) + tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL); + WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); + ++ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); ++ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); ++ + /* After HDP is initialized, flush HDP.*/ + adev->nbio_funcs->hdp_flush(adev, NULL); + +-- +2.17.1 + |