diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1896-drm-amd-display-reset-retimer-redriver-below-340Mhz.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1896-drm-amd-display-reset-retimer-redriver-below-340Mhz.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1896-drm-amd-display-reset-retimer-redriver-below-340Mhz.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1896-drm-amd-display-reset-retimer-redriver-below-340Mhz.patch new file mode 100644 index 00000000..633f0a60 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1896-drm-amd-display-reset-retimer-redriver-below-340Mhz.patch @@ -0,0 +1,69 @@ +From 142a196ba9726a7d02a04e68edfb69a7b96b16f2 Mon Sep 17 00:00:00 2001 +From: Charlene Liu <charlene.liu@amd.com> +Date: Tue, 23 Apr 2019 21:59:54 -0400 +Subject: [PATCH 1896/2940] drm/amd/display: reset retimer/redriver below + 340Mhz + +[Description] +This is for HDMI 6Ghz mode before we load the driver, because VBIOS +not support HDMI (6Ghz mode) + +Reset to redriver/retimer setting for the setting for below 340Mhz. + +Change-Id: I998b371d075c570ccea4305345e5fd66d2cbdf2e +Signed-off-by: Charlene Liu <charlene.liu@amd.com> +Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet Lakha@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 28 ++++++++++++++++--- + 1 file changed, 24 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +index 30d0dc10fdbb..842fc7a652c6 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +@@ -2713,17 +2713,37 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option) + { + struct dc *core_dc = pipe_ctx->stream->ctx->dc; + struct dc_stream_state *stream = pipe_ctx->stream; ++ struct dc_link *link = stream->sink->link; + + core_dc->hwss.blank_stream(pipe_ctx); + + if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) + deallocate_mst_payload(pipe_ctx); + +- if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) +- dal_ddc_service_write_scdc_data( +- stream->link->ddc, 0, +- stream->timing.flags.LTE_340MCSC_SCRAMBLE); ++ if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) { ++ struct ext_hdmi_settings settings = {0}; ++ enum engine_id eng_id = pipe_ctx->stream_res.stream_enc->id; + ++ unsigned short masked_chip_caps = link->chip_caps & ++ EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK; ++ //Need to inform that sink is going to use legacy HDMI mode. ++ dal_ddc_service_write_scdc_data( ++ link->ddc, ++ 165000,//vbios only handles 165Mhz. ++ false); ++ if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) { ++ /* DP159, Retimer settings */ ++ if (get_ext_hdmi_settings(pipe_ctx, eng_id, &settings)) ++ write_i2c_retimer_setting(pipe_ctx, ++ false, false, &settings); ++ else ++ write_i2c_default_retimer_setting(pipe_ctx, ++ false, false); ++ } else if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) { ++ /* PI3EQX1204, Redriver settings */ ++ write_i2c_redriver_setting(pipe_ctx, false); ++ } ++ } + core_dc->hwss.disable_stream(pipe_ctx, option); + + disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal); +-- +2.17.1 + |