diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1875-drm-amdgpu-cleanup-GMC-v9-TLB-invalidation.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1875-drm-amdgpu-cleanup-GMC-v9-TLB-invalidation.patch | 165 |
1 files changed, 165 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1875-drm-amdgpu-cleanup-GMC-v9-TLB-invalidation.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1875-drm-amdgpu-cleanup-GMC-v9-TLB-invalidation.patch new file mode 100644 index 00000000..9c14b577 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1875-drm-amdgpu-cleanup-GMC-v9-TLB-invalidation.patch @@ -0,0 +1,165 @@ +From 429c473e48630eaf7d551a94802ce7f1265af352 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Thu, 25 Oct 2018 10:49:07 +0200 +Subject: [PATCH 1875/2940] drm/amdgpu: cleanup GMC v9 TLB invalidation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Move the kiq handling into amdgpu_virt.c and drop the fallback. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Emily Deng <Emily.Deng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 40 ++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 ++ + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 53 +++--------------------- + 3 files changed, 49 insertions(+), 47 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +index a1b49bab4588..7d484fad3909 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +@@ -133,6 +133,46 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) + pr_err("failed to write reg:%x\n", reg); + } + ++void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev, ++ uint32_t reg0, uint32_t reg1, ++ uint32_t ref, uint32_t mask) ++{ ++ struct amdgpu_kiq *kiq = &adev->gfx.kiq; ++ struct amdgpu_ring *ring = &kiq->ring; ++ signed long r, cnt = 0; ++ unsigned long flags; ++ uint32_t seq; ++ ++ spin_lock_irqsave(&kiq->ring_lock, flags); ++ amdgpu_ring_alloc(ring, 32); ++ amdgpu_ring_emit_reg_write_reg_wait(ring, reg0, reg1, ++ ref, mask); ++ amdgpu_fence_emit_polling(ring, &seq); ++ amdgpu_ring_commit(ring); ++ spin_unlock_irqrestore(&kiq->ring_lock, flags); ++ ++ r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); ++ ++ /* don't wait anymore for IRQ context */ ++ if (r < 1 && in_interrupt()) ++ goto failed_kiq; ++ ++ might_sleep(); ++ while (r < 1 && cnt++ < MAX_KIQ_REG_TRY) { ++ ++ msleep(MAX_KIQ_REG_BAILOUT_INTERVAL); ++ r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); ++ } ++ ++ if (cnt > MAX_KIQ_REG_TRY) ++ goto failed_kiq; ++ ++ return; ++ ++failed_kiq: ++ pr_err("failed to write reg %x wait reg %x\n", reg0, reg1); ++} ++ + /** + * amdgpu_virt_request_full_gpu() - request full gpu access + * @amdgpu: amdgpu device. +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +index d87c98b9263c..584947b7ccf3 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +@@ -291,6 +291,9 @@ bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev); + void amdgpu_virt_init_setting(struct amdgpu_device *adev); + uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); + void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); ++void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev, ++ uint32_t reg0, uint32_t rreg1, ++ uint32_t ref, uint32_t mask); + int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init); + int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init); + int amdgpu_virt_reset_gpu(struct amdgpu_device *adev); +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 842ab8a1fbd1..af3d0bb07eb8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -392,48 +392,6 @@ static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid, + return req; + } + +-static signed long amdgpu_kiq_reg_write_reg_wait(struct amdgpu_device *adev, +- uint32_t reg0, uint32_t reg1, +- uint32_t ref, uint32_t mask) +-{ +- signed long r, cnt = 0; +- unsigned long flags; +- uint32_t seq; +- struct amdgpu_kiq *kiq = &adev->gfx.kiq; +- struct amdgpu_ring *ring = &kiq->ring; +- +- spin_lock_irqsave(&kiq->ring_lock, flags); +- +- amdgpu_ring_alloc(ring, 32); +- amdgpu_ring_emit_reg_write_reg_wait(ring, reg0, reg1, +- ref, mask); +- amdgpu_fence_emit_polling(ring, &seq); +- amdgpu_ring_commit(ring); +- spin_unlock_irqrestore(&kiq->ring_lock, flags); +- +- r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); +- +- /* don't wait anymore for IRQ context */ +- if (r < 1 && in_interrupt()) +- goto failed_kiq; +- +- might_sleep(); +- +- while (r < 1 && cnt++ < MAX_KIQ_REG_TRY) { +- msleep(MAX_KIQ_REG_BAILOUT_INTERVAL); +- r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT); +- } +- +- if (cnt > MAX_KIQ_REG_TRY) +- goto failed_kiq; +- +- return 0; +- +-failed_kiq: +- pr_err("failed to invalidate tlb with kiq\n"); +- return r; +-} +- + /* + * GART + * VMID 0 is the physical GPU addresses as used by the kernel. +@@ -455,7 +413,6 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, + { + const unsigned eng = 17; + unsigned i, j; +- int r; + + for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) { + struct amdgpu_vmhub *hub = &adev->vmhub[i]; +@@ -464,10 +421,12 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, + if (adev->gfx.kiq.ring.sched.ready && + (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) && + !adev->in_gpu_reset) { +- r = amdgpu_kiq_reg_write_reg_wait(adev, hub->vm_inv_eng0_req + eng, +- hub->vm_inv_eng0_ack + eng, tmp, 1 << vmid); +- if (!r) +- continue; ++ uint32_t req = hub->vm_inv_eng0_req + eng; ++ uint32_t ack = hub->vm_inv_eng0_ack + eng; ++ ++ amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, tmp, ++ 1 << vmid); ++ continue; + } + + spin_lock(&adev->gmc.invalidate_lock); +-- +2.17.1 + |