diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1836-drm-amdgpu-expose-VCE-4.0-powergate-interface.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1836-drm-amdgpu-expose-VCE-4.0-powergate-interface.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1836-drm-amdgpu-expose-VCE-4.0-powergate-interface.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1836-drm-amdgpu-expose-VCE-4.0-powergate-interface.patch new file mode 100644 index 00000000..744476d3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1836-drm-amdgpu-expose-VCE-4.0-powergate-interface.patch @@ -0,0 +1,75 @@ +From c60f42666191e4be1709d23d99cb0807f70496cc Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Thu, 25 Apr 2019 15:35:17 +0800 +Subject: [PATCH 1836/2940] drm/amdgpu: expose VCE 4.0 powergate interface + +SMU will use this interface to power down the VCE engine. + +Change-Id: I93a5887ddd425d8eb25b0cff812033a61f319593 +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 15 ++++++--------- + 1 file changed, 6 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +index aadc3e66ebd7..f3f5938430d4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c +@@ -382,6 +382,7 @@ static int vce_v4_0_start(struct amdgpu_device *adev) + static int vce_v4_0_stop(struct amdgpu_device *adev) + { + ++ /* Disable VCPU */ + WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CNTL), 0, ~0x200001); + + /* hold on ECPU */ +@@ -389,8 +390,8 @@ static int vce_v4_0_stop(struct amdgpu_device *adev) + VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK, + ~VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK); + +- /* clear BUSY flag */ +- WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0, ~VCE_STATUS__JOB_BUSY_MASK); ++ /* clear VCE_STATUS */ ++ WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0); + + /* Set Clock-Gating off */ + /* if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG) +@@ -922,6 +923,7 @@ static int vce_v4_0_set_clockgating_state(void *handle, + + return 0; + } ++#endif + + static int vce_v4_0_set_powergating_state(void *handle, + enum amd_powergating_state state) +@@ -935,16 +937,11 @@ static int vce_v4_0_set_powergating_state(void *handle, + */ + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- if (!(adev->pg_flags & AMD_PG_SUPPORT_VCE)) +- return 0; +- + if (state == AMD_PG_STATE_GATE) +- /* XXX do we need a vce_v4_0_stop()? */ +- return 0; ++ return vce_v4_0_stop(adev); + else + return vce_v4_0_start(adev); + } +-#endif + + static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, + struct amdgpu_ib *ib, uint32_t flags) +@@ -1059,7 +1056,7 @@ const struct amd_ip_funcs vce_v4_0_ip_funcs = { + .soft_reset = NULL /* vce_v4_0_soft_reset */, + .post_soft_reset = NULL /* vce_v4_0_post_soft_reset */, + .set_clockgating_state = vce_v4_0_set_clockgating_state, +- .set_powergating_state = NULL /* vce_v4_0_set_powergating_state */, ++ .set_powergating_state = vce_v4_0_set_powergating_state, + }; + + static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = { +-- +2.17.1 + |