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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1832-drm-amd-display-Add-hubp_init-entry-to-hubp-vtable.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1832-drm-amd-display-Add-hubp_init-entry-to-hubp-vtable.patch99
1 files changed, 99 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1832-drm-amd-display-Add-hubp_init-entry-to-hubp-vtable.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1832-drm-amd-display-Add-hubp_init-entry-to-hubp-vtable.patch
new file mode 100644
index 00000000..d9d3080d
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1832-drm-amd-display-Add-hubp_init-entry-to-hubp-vtable.patch
@@ -0,0 +1,99 @@
+From ceda7dd4d6854587267618b7e7f5091ebce019d4 Mon Sep 17 00:00:00 2001
+From: Charlene Liu <charlene.liu@amd.com>
+Date: Wed, 10 Apr 2019 21:43:23 -0400
+Subject: [PATCH 1832/2940] drm/amd/display: Add hubp_init entry to hubp vtable
+
+Different HW will need to init HUBP differently. For now, add a vtable
+entry, and hook a NO-OP for DCN1.
+
+In addition, future HW will need to access the HUBPREQ_DEBUG register
+for hubp_init. Add it to the reg list.
+
+Signed-off-by: Charlene Liu <charlene.liu@amd.com>
+Reviewed-by: Jun Lei <Jun.Lei@amd.com>
+Acked-by: Leo Li <sunpeng.li@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 6 +++++-
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 4 ++++
+ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 +
+ drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 1 +
+ 4 files changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+index 0ba68d41b9c3..54b219a710d8 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+@@ -1178,6 +1178,10 @@ void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
+ REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
+ }
+
++void hubp1_init(struct hubp *hubp)
++{
++ //do nothing
++}
+ static const struct hubp_funcs dcn10_hubp_funcs = {
+ .hubp_program_surface_flip_and_addr =
+ hubp1_program_surface_flip_and_addr,
+@@ -1201,7 +1205,7 @@ static const struct hubp_funcs dcn10_hubp_funcs = {
+ .hubp_clear_underflow = hubp1_clear_underflow,
+ .hubp_disable_control = hubp1_disable_control,
+ .hubp_get_underflow_status = hubp1_get_underflow_status,
+-
++ .hubp_init = hubp1_init,
+ };
+
+ /*****************************************/
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+index db98ba361686..99d2b7e2a578 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+@@ -34,6 +34,7 @@
+ #define HUBP_REG_LIST_DCN(id)\
+ SRI(DCHUBP_CNTL, HUBP, id),\
+ SRI(HUBPREQ_DEBUG_DB, HUBP, id),\
++ SRI(HUBPREQ_DEBUG, HUBP, id),\
+ SRI(DCSURF_ADDR_CONFIG, HUBP, id),\
+ SRI(DCSURF_TILING_CONFIG, HUBP, id),\
+ SRI(DCSURF_SURFACE_PITCH, HUBPREQ, id),\
+@@ -138,6 +139,7 @@
+ #define HUBP_COMMON_REG_VARIABLE_LIST \
+ uint32_t DCHUBP_CNTL; \
+ uint32_t HUBPREQ_DEBUG_DB; \
++ uint32_t HUBPREQ_DEBUG; \
+ uint32_t DCSURF_ADDR_CONFIG; \
+ uint32_t DCSURF_TILING_CONFIG; \
+ uint32_t DCSURF_SURFACE_PITCH; \
+@@ -749,4 +751,6 @@ enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch);
+ void hubp1_vready_workaround(struct hubp *hubp,
+ struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
+
++void hubp1_init(struct hubp *hubp);
++
+ #endif
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+index 4f144ac42380..590122156783 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+@@ -1123,6 +1123,7 @@ static void dcn10_init_hw(struct dc *dc)
+ struct hubp *hubp = dc->res_pool->hubps[i];
+ struct dpp *dpp = dc->res_pool->dpps[i];
+
++ hubp->funcs->hubp_init(hubp);
+ dc->res_pool->opps[i]->mpc_tree_params.opp_id = dc->res_pool->opps[i]->inst;
+ plane_atomic_power_down(dc, dpp, hubp);
+ }
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+index 1cd07e94ee63..455df4999797 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+@@ -130,6 +130,7 @@ struct hubp_funcs {
+ void (*hubp_clear_underflow)(struct hubp *hubp);
+ void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
+ unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
++ void (*hubp_init)(struct hubp *hubp);
+
+ };
+
+--
+2.17.1
+