diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1775-drm-amd-display-Read-eDP-link-settings-on-detection.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1775-drm-amd-display-Read-eDP-link-settings-on-detection.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1775-drm-amd-display-Read-eDP-link-settings-on-detection.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1775-drm-amd-display-Read-eDP-link-settings-on-detection.patch new file mode 100644 index 00000000..b6e9a41b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/1775-drm-amd-display-Read-eDP-link-settings-on-detection.patch @@ -0,0 +1,76 @@ +From a2968895161859072919fd6a0894544e4f60b17f Mon Sep 17 00:00:00 2001 +From: Anthony Koo <Anthony.Koo@amd.com> +Date: Mon, 25 Mar 2019 20:33:35 -0400 +Subject: [PATCH 1775/2940] drm/amd/display: Read eDP link settings on + detection + +[Why] +Unlike external DP panels, internal eDP does not perform +verify link caps because the panel connection is fixed. + +So if GOP enabled the eDP at boot, we can retain its +trained link settings to optimize. + +[How] +Read the lane count and link rate by reading this +information from DPCD 100h, 101h, 115h + +Change-Id: If2f9588401731237e4dd7c587f4217bca4e5e08e +Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> +Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet Lakha@amd.com> +--- + .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 30 +++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +index acb4f829e042..ba7502f3d0eb 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +@@ -2587,6 +2587,9 @@ void detect_edp_sink_caps(struct dc_link *link) + uint32_t entry; + uint32_t link_rate_in_khz; + enum dc_link_rate link_rate = LINK_RATE_UNKNOWN; ++ union lane_count_set lane_count_set = { {0} }; ++ uint8_t link_bw_set; ++ uint8_t link_rate_set; + + retrieve_link_cap(link); + link->dpcd_caps.edp_supported_link_rates_count = 0; +@@ -2612,6 +2615,33 @@ void detect_edp_sink_caps(struct dc_link *link) + } + } + link->verified_link_cap = link->reported_link_cap; ++ ++ // Read DPCD 00101h to find out the number of lanes currently set ++ core_link_read_dpcd(link, DP_LANE_COUNT_SET, ++ &lane_count_set.raw, sizeof(lane_count_set)); ++ link->cur_link_settings.lane_count = lane_count_set.bits.LANE_COUNT_SET; ++ ++ // Read DPCD 00100h to find if standard link rates are set ++ core_link_read_dpcd(link, DP_LINK_BW_SET, ++ &link_bw_set, sizeof(link_bw_set)); ++ ++ if (link_bw_set == 0) { ++ /* If standard link rates are not being used, ++ * Read DPCD 00115h to find the link rate set used ++ */ ++ core_link_read_dpcd(link, DP_LINK_RATE_SET, ++ &link_rate_set, sizeof(link_rate_set)); ++ ++ if (link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) { ++ link->cur_link_settings.link_rate = ++ link->dpcd_caps.edp_supported_link_rates[link_rate_set]; ++ link->cur_link_settings.link_rate_set = link_rate_set; ++ link->cur_link_settings.use_link_rate_set = true; ++ } ++ } else { ++ link->cur_link_settings.link_rate = link_bw_set; ++ link->cur_link_settings.use_link_rate_set = false; ++ } + } + + void dc_link_dp_enable_hpd(const struct dc_link *link) +-- +2.17.1 + |