diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4092-drm-amdgpu-fix-CG-enabling-hang-with-gfxoff-enabled.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4092-drm-amdgpu-fix-CG-enabling-hang-with-gfxoff-enabled.patch | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4092-drm-amdgpu-fix-CG-enabling-hang-with-gfxoff-enabled.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4092-drm-amdgpu-fix-CG-enabling-hang-with-gfxoff-enabled.patch new file mode 100644 index 00000000..fd7618dc --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4092-drm-amdgpu-fix-CG-enabling-hang-with-gfxoff-enabled.patch @@ -0,0 +1,104 @@ +From 5e9d7566c211c17a8ce6cd4b8093c8933013f63c Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Fri, 1 Jun 2018 14:41:04 +0800 +Subject: [PATCH 4092/4131] drm/amdgpu: fix CG enabling hang with gfxoff + enabled +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +After defer the execution of clockgating enabling, at that time, gfx already +enter into "off" state. Howerver, clockgating enabling will use MMIO to access +the gfx registers, then get the gfx hung. + +So here we should move the gfx powergating and gfxoff enabling behavior at the +end of initialization behind clockgating. + +Signed-off-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +Cc: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++++++++++ + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 ----- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 2 +- + drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 4 ++-- + 4 files changed, 15 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index fdad091..2bac39ee 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -1773,6 +1773,18 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev) + } + } + } ++ ++ if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) { ++ /* enable gfx powergating */ ++ amdgpu_device_ip_set_powergating_state(adev, ++ AMD_IP_BLOCK_TYPE_GFX, ++ AMD_PG_STATE_GATE); ++ /* enable gfxoff */ ++ amdgpu_device_ip_set_powergating_state(adev, ++ AMD_IP_BLOCK_TYPE_SMC, ++ AMD_PG_STATE_GATE); ++ } ++ + return 0; + } + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 2c634a2..fc1804d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -3354,11 +3354,6 @@ static int gfx_v9_0_late_init(void *handle) + if (r) + return r; + +- r = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX, +- AMD_PG_STATE_GATE); +- if (r) +- return r; +- + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 4449d0f..2b15d27 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -245,7 +245,7 @@ static int pp_set_powergating_state(void *handle, + } + + if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) { +- pr_info("%s was not implemented.\n", __func__); ++ pr_debug("%s was not implemented.\n", __func__); + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +index 5edd15c..c821516 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +@@ -284,7 +284,7 @@ static int smu10_disable_gfx_off(struct pp_hwmgr *hwmgr) + + static int smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) + { +- return smu10_disable_gfx_off(hwmgr); ++ return 0; + } + + static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) +@@ -299,7 +299,7 @@ static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) + + static int smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) + { +- return smu10_enable_gfx_off(hwmgr); ++ return 0; + } + + static int smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable) +-- +2.7.4 + |