diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4087-drm-amd-pp-fix-a-couple-locking-issues.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4087-drm-amd-pp-fix-a-couple-locking-issues.patch | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4087-drm-amd-pp-fix-a-couple-locking-issues.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4087-drm-amd-pp-fix-a-couple-locking-issues.patch new file mode 100644 index 00000000..9df4e402 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4087-drm-amd-pp-fix-a-couple-locking-issues.patch @@ -0,0 +1,97 @@ +From 5fd279242effc7b3f87bd66f49f154f8c3ae1664 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Fri, 18 May 2018 14:59:46 +0800 +Subject: [PATCH 4087/4131] drm/amd/pp: fix a couple locking issues + +We should return unlock on the error path + +Change-Id: I05f5c1a453167cc00941ed7be4aa71626c04e46c +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + .../gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c | 27 ++++++++++++++-------- + 1 file changed, 17 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c +index e374f3b..3cca733 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c +@@ -795,40 +795,44 @@ int smu7_enable_didt_config(struct pp_hwmgr *hwmgr) + + if (hwmgr->chip_id == CHIP_POLARIS10) { + result = smu7_program_pt_config_registers(hwmgr, GCCACConfig_Polaris10); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + result = smu7_program_pt_config_registers(hwmgr, DIDTConfig_Polaris10); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + } else if (hwmgr->chip_id == CHIP_POLARIS11) { + result = smu7_program_pt_config_registers(hwmgr, GCCACConfig_Polaris11); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + if (hwmgr->is_kicker) + result = smu7_program_pt_config_registers(hwmgr, DIDTConfig_Polaris11_Kicker); + else + result = smu7_program_pt_config_registers(hwmgr, DIDTConfig_Polaris11); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + } else if (hwmgr->chip_id == CHIP_POLARIS12) { + result = smu7_program_pt_config_registers(hwmgr, GCCACConfig_Polaris11); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + result = smu7_program_pt_config_registers(hwmgr, DIDTConfig_Polaris12); +- PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "DIDT Config failed.", goto error); + } + } + cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2); + + result = smu7_enable_didt(hwmgr, true); +- PP_ASSERT_WITH_CODE((result == 0), "EnableDiDt failed.", return result); ++ PP_ASSERT_WITH_CODE((result == 0), "EnableDiDt failed.", goto error); + + if (hwmgr->chip_id == CHIP_POLARIS11) { + result = smum_send_msg_to_smc(hwmgr, + (uint16_t)(PPSMC_MSG_EnableDpmDidt)); + PP_ASSERT_WITH_CODE((0 == result), +- "Failed to enable DPM DIDT.", return result); ++ "Failed to enable DPM DIDT.", goto error); + } + mutex_unlock(&adev->grbm_idx_mutex); + adev->gfx.rlc.funcs->exit_safe_mode(adev); + } + + return 0; ++error: ++ mutex_unlock(&adev->grbm_idx_mutex); ++ adev->gfx.rlc.funcs->exit_safe_mode(adev); ++ return result; + } + + int smu7_disable_didt_config(struct pp_hwmgr *hwmgr) +@@ -846,17 +850,20 @@ int smu7_disable_didt_config(struct pp_hwmgr *hwmgr) + result = smu7_enable_didt(hwmgr, false); + PP_ASSERT_WITH_CODE((result == 0), + "Post DIDT enable clock gating failed.", +- return result); ++ goto error); + if (hwmgr->chip_id == CHIP_POLARIS11) { + result = smum_send_msg_to_smc(hwmgr, + (uint16_t)(PPSMC_MSG_DisableDpmDidt)); + PP_ASSERT_WITH_CODE((0 == result), +- "Failed to disable DPM DIDT.", return result); ++ "Failed to disable DPM DIDT.", goto error); + } + adev->gfx.rlc.funcs->exit_safe_mode(adev); + } + + return 0; ++error: ++ adev->gfx.rlc.funcs->exit_safe_mode(adev); ++ return result; + } + + int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr) +-- +2.7.4 + |