diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4078-drm-amd-pp-Fix-bug-voltage-can-t-be-OD-separately-on.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4078-drm-amd-pp-Fix-bug-voltage-can-t-be-OD-separately-on.patch | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4078-drm-amd-pp-Fix-bug-voltage-can-t-be-OD-separately-on.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4078-drm-amd-pp-Fix-bug-voltage-can-t-be-OD-separately-on.patch new file mode 100644 index 00000000..59844576 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4078-drm-amd-pp-Fix-bug-voltage-can-t-be-OD-separately-on.patch @@ -0,0 +1,56 @@ +From 979739b971322d2869a02e784427e422933e7921 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 17 Apr 2018 17:26:26 +0800 +Subject: [PATCH 4078/4131] drm/amd/pp: Fix bug voltage can't be OD separately + on VI + +Make sure to update the MCLK and SCLK flags when setting the VDDC +flags due to dependencies. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 16 ++++++++++------ + 1 file changed, 10 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index 31d3089..9130807 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -4677,23 +4677,27 @@ static void smu7_check_dpm_table_updated(struct pp_hwmgr *hwmgr) + + for (i=0; i < dep_table->count; i++) { + if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { +- data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC; +- break; ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK; ++ return; + } + } +- if (i == dep_table->count) ++ if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) { + data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; ++ } + + dep_table = table_info->vdd_dep_on_sclk; + odn_dep_table = (struct phm_ppt_v1_clock_voltage_dependency_table *)&(odn_table->vdd_dependency_on_sclk); + for (i=0; i < dep_table->count; i++) { + if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { +- data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC; +- break; ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK; ++ return; + } + } +- if (i == dep_table->count) ++ if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) { + data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; ++ } + } + + static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, +-- +2.7.4 + |