diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4073-drm-amd-pp-Refine-get_gpu_power-for-VI.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4073-drm-amd-pp-Refine-get_gpu_power-for-VI.patch | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4073-drm-amd-pp-Refine-get_gpu_power-for-VI.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4073-drm-amd-pp-Refine-get_gpu_power-for-VI.patch new file mode 100644 index 00000000..a2a08da7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4073-drm-amd-pp-Refine-get_gpu_power-for-VI.patch @@ -0,0 +1,114 @@ +From ddb8afbba2591fe91a852335fc75dd0f4e2c097a Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 4 Apr 2018 14:17:09 +0800 +Subject: [PATCH 4073/4131] drm/amd/pp: Refine get_gpu_power for VI + +pkgpwr is the average gpu power of 100ms. it is calculated by +firmware in real time. + +1. we can send smu message PPSMC_MSG_GetCurrPkgPwr to read currentpkgpwr directly. + +2. On Fiji/tonga/bonaire/hawwii, without PPSMC_MSG_GetCurrPkgPwr support. + Send PPSMC_MSG_PmStatusLogStart/Sample to let smu write currentpkgpwr + to ixSMU_PM_STATUS_94. driver can read pkgpwr from ixSMU_PM_STATUS_94. + +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 51 ++++++++++++---------- + drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 10 +++-- + 2 files changed, 34 insertions(+), 27 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index eb2af2f..0980117 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -3332,30 +3332,33 @@ static int smu7_get_pp_table_entry(struct pp_hwmgr *hwmgr, + static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, + struct pp_gpu_power *query) + { +- PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, +- PPSMC_MSG_PmStatusLogStart), +- "Failed to start pm status log!", +- return -1); +- +- msleep_interruptible(20); +- +- PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, +- PPSMC_MSG_PmStatusLogSample), +- "Failed to sample pm status log!", +- return -1); +- +- query->vddc_power = cgs_read_ind_register(hwmgr->device, +- CGS_IND_REG__SMC, +- ixSMU_PM_STATUS_40); +- query->vddci_power = cgs_read_ind_register(hwmgr->device, +- CGS_IND_REG__SMC, +- ixSMU_PM_STATUS_49); +- query->max_gpu_power = cgs_read_ind_register(hwmgr->device, +- CGS_IND_REG__SMC, +- ixSMU_PM_STATUS_94); +- query->average_gpu_power = cgs_read_ind_register(hwmgr->device, +- CGS_IND_REG__SMC, +- ixSMU_PM_STATUS_95); ++ int i; ++ ++ if (!query) ++ return -EINVAL; ++ ++ ++ memset(query, 0, sizeof *query); ++ ++ smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetCurrPkgPwr, 0); ++ query->average_gpu_power = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); ++ ++ if (query->average_gpu_power != 0) ++ return 0; ++ ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart); ++ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ++ ixSMU_PM_STATUS_94, 0); ++ ++ for (i = 0; i < 20; i++) { ++ mdelay(1); ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample); ++ query->average_gpu_power = cgs_read_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ++ ixSMU_PM_STATUS_94); ++ if (query->average_gpu_power != 0) ++ break; ++ } + + return 0; + } +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +index fb32a3f..10a1123 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +@@ -171,8 +171,10 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) + + ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); + +- if (ret != 1) +- pr_info("\n failed to send pre message %x ret is %d \n", msg, ret); ++ if (ret == 0xFE) ++ pr_debug("last message was not supported\n"); ++ else if (ret != 1) ++ pr_info("\n last message was failed ret is %d\n", ret); + + cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); + +@@ -180,7 +182,9 @@ int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) + + ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); + +- if (ret != 1) ++ if (ret == 0xFE) ++ pr_debug("message %x was not supported\n", msg); ++ else if (ret != 1) + pr_info("\n failed to send message %x ret is %d \n", msg, ret); + + return 0; +-- +2.7.4 + |