diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4065-drm-amd-pp-fix-the-wrong-readout-engine-clock-in-dee.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4065-drm-amd-pp-fix-the-wrong-readout-engine-clock-in-dee.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4065-drm-amd-pp-fix-the-wrong-readout-engine-clock-in-dee.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4065-drm-amd-pp-fix-the-wrong-readout-engine-clock-in-dee.patch new file mode 100644 index 00000000..47a4f51f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4065-drm-amd-pp-fix-the-wrong-readout-engine-clock-in-dee.patch @@ -0,0 +1,63 @@ +From 48e031b7d4d9ce563abe9f53303b18281840560f Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Tue, 10 Apr 2018 13:05:49 +0800 +Subject: [PATCH 4065/4131] drm/amd/pp: fix the wrong readout engine clock in + deep sleep + +Change-Id: Ibd10127ee582ed710baa5dcbe7699f2a8e3026dc +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 13 ++++--------- + drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h | 2 +- + 2 files changed, 5 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index ec3f824..b059deb 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -3804,7 +3804,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx, + void *value, int *size) + { + struct amdgpu_device *adev = hwmgr->adev; +- uint32_t sclk_idx, mclk_idx, activity_percent = 0; ++ uint32_t sclk_mhz, mclk_idx, activity_percent = 0; + struct vega10_hwmgr *data = hwmgr->backend; + struct vega10_dpm_table *dpm_table = &data->dpm_table; + int ret = 0; +@@ -3812,14 +3812,9 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx, + + switch (idx) { + case AMDGPU_PP_SENSOR_GFX_SCLK: +- smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex); +- sclk_idx = smum_get_argument(hwmgr); +- if (sclk_idx < dpm_table->gfx_table.count) { +- *((uint32_t *)value) = dpm_table->gfx_table.dpm_levels[sclk_idx].value; +- *size = 4; +- } else { +- ret = -EINVAL; +- } ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetAverageGfxclkActualFrequency); ++ sclk_mhz = smum_get_argument(hwmgr); ++ *((uint32_t *)value) = sclk_mhz * 100; + break; + case AMDGPU_PP_SENSOR_GFX_MCLK: + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex); +diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h +index fdd9a7a..715b5a1 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h +@@ -131,9 +131,9 @@ typedef uint16_t PPSMC_Result; + #define PPSMC_MSG_RunAcgInOpenLoop 0x5E + #define PPSMC_MSG_InitializeAcg 0x5F + #define PPSMC_MSG_GetCurrPkgPwr 0x61 ++#define PPSMC_MSG_GetAverageGfxclkActualFrequency 0x63 + #define PPSMC_MSG_SetPccThrottleLevel 0x67 + #define PPSMC_MSG_UpdatePkgPwrPidAlpha 0x68 +-#define PPSMC_MSG_UpdatePkgPwrPidAlpha 0x68 + #define PPSMC_Message_Count 0x69 + + +-- +2.7.4 + |