diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4064-drm-amd-pp-Refine-pp_atomfwctrl_get_vbios_bootup_val.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4064-drm-amd-pp-Refine-pp_atomfwctrl_get_vbios_bootup_val.patch | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4064-drm-amd-pp-Refine-pp_atomfwctrl_get_vbios_bootup_val.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4064-drm-amd-pp-Refine-pp_atomfwctrl_get_vbios_bootup_val.patch new file mode 100644 index 00000000..f9c46ba3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4064-drm-amd-pp-Refine-pp_atomfwctrl_get_vbios_bootup_val.patch @@ -0,0 +1,86 @@ +From bc7377925f9b5b7577946b5a51cf705a93aad0e0 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 4 Apr 2018 12:36:57 +0800 +Subject: [PATCH 4064/4131] drm/amd/pp: Refine + pp_atomfwctrl_get_vbios_bootup_values + +In order to share pp_atomfwctrl_get_vbios_bootup_values +on asics with different BIOS_CLKID. +Not call function pp_atomfwctrl_get_clk_information_by_clkid in +pp_atomfwctrl_get_vbios_bootup_values. + + Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c | 9 +-------- + drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h | 2 ++ + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 ++++++ + 3 files changed, 9 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c +index 0adaf36..c97b0e5 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c +@@ -488,7 +488,7 @@ int pp_atomfwctrl_get_gpio_information(struct pp_hwmgr *hwmgr, + return 0; + } + +-int pp_atomfwctrl__get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLKID id, uint32_t *frequency) ++int pp_atomfwctrl_get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLKID id, uint32_t *frequency) + { + struct amdgpu_device *adev = hwmgr->adev; + struct atom_get_smu_clock_info_parameters_v3_1 parameters; +@@ -515,7 +515,6 @@ int pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr, + { + struct atom_firmware_info_v3_1 *info = NULL; + uint16_t ix; +- uint32_t frequency = 0; + + ix = GetIndexIntoMasterDataTable(firmwareinfo); + info = (struct atom_firmware_info_v3_1 *) +@@ -538,12 +537,6 @@ int pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr, + boot_values->ulSocClk = 0; + boot_values->ulDCEFClk = 0; + +- if (!pp_atomfwctrl__get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_SOCCLK_ID, &frequency)) +- boot_values->ulSocClk = frequency; +- +- if (!pp_atomfwctrl__get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_DCEFCLK_ID, &frequency)) +- boot_values->ulDCEFClk = frequency; +- + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h +index 8df1e84f..fe10aa4 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h +@@ -230,6 +230,8 @@ int pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr, + struct pp_atomfwctrl_bios_boot_up_values *boot_values); + int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr, + struct pp_atomfwctrl_smc_dpm_parameters *param); ++int pp_atomfwctrl_get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, ++ BIOS_CLKID id, uint32_t *frequency); + + #endif + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index dbf3e7d..ec3f824 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -2477,6 +2477,12 @@ static int vega10_init_smc_table(struct pp_hwmgr *hwmgr) + data->vbios_boot_state.mvddc = boot_up_values.usMvddc; + data->vbios_boot_state.gfx_clock = boot_up_values.ulGfxClk; + data->vbios_boot_state.mem_clock = boot_up_values.ulUClk; ++ pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, ++ SMU9_SYSPLL0_SOCCLK_ID, &boot_up_values.ulSocClk); ++ ++ pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, ++ SMU9_SYSPLL0_DCEFCLK_ID, &boot_up_values.ulDCEFClk); ++ + data->vbios_boot_state.soc_clock = boot_up_values.ulSocClk; + data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; + if (0 != boot_up_values.usVddc) { +-- +2.7.4 + |