diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4045-drm-amdgpu-clear-gfxoff-featue-mask-if-the-asic-is-n.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4045-drm-amdgpu-clear-gfxoff-featue-mask-if-the-asic-is-n.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4045-drm-amdgpu-clear-gfxoff-featue-mask-if-the-asic-is-n.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4045-drm-amdgpu-clear-gfxoff-featue-mask-if-the-asic-is-n.patch new file mode 100644 index 00000000..051816a0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/4045-drm-amdgpu-clear-gfxoff-featue-mask-if-the-asic-is-n.patch @@ -0,0 +1,54 @@ +From 570dbd7aad7f678d9cedde161a5ba69302879662 Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Tue, 13 Mar 2018 17:59:12 +0800 +Subject: [PATCH 4045/4131] drm/amdgpu: clear gfxoff featue mask if the asic is + not raven +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +index bca67df..d1052b5 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +@@ -95,7 +95,8 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr) + hwmgr->smumgr_funcs = &ci_smu_funcs; + ci_set_asic_special_caps(hwmgr); + hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK | +- PP_ENABLE_GFX_CG_THRU_SMU); ++ PP_ENABLE_GFX_CG_THRU_SMU | ++ PP_GFXOFF_MASK); + hwmgr->pp_table_version = PP_TABLE_V0; + hwmgr->od_enabled = false; + smu7_init_function_pointers(hwmgr); +@@ -103,9 +104,11 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr) + case AMDGPU_FAMILY_CZ: + hwmgr->od_enabled = false; + hwmgr->smumgr_funcs = &smu8_smu_funcs; ++ hwmgr->feature_mask &= ~PP_GFXOFF_MASK; + smu8_init_function_pointers(hwmgr); + break; + case AMDGPU_FAMILY_VI: ++ hwmgr->feature_mask &= ~PP_GFXOFF_MASK; + switch (hwmgr->chip_id) { + case CHIP_TOPAZ: + hwmgr->smumgr_funcs = &iceland_smu_funcs; +@@ -139,6 +142,7 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr) + smu7_init_function_pointers(hwmgr); + break; + case AMDGPU_FAMILY_AI: ++ hwmgr->feature_mask &= ~PP_GFXOFF_MASK; + switch (hwmgr->chip_id) { + case CHIP_VEGA10: + hwmgr->smumgr_funcs = &vega10_smu_funcs; +-- +2.7.4 + |