diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3931-drm-amd-display-drop-dc_validate_guaranteed.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3931-drm-amd-display-drop-dc_validate_guaranteed.patch | 450 |
1 files changed, 450 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3931-drm-amd-display-drop-dc_validate_guaranteed.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3931-drm-amd-display-drop-dc_validate_guaranteed.patch new file mode 100644 index 00000000..ded3c121 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3931-drm-amd-display-drop-dc_validate_guaranteed.patch @@ -0,0 +1,450 @@ +From 72d3a73a2b3b1fc954815f034c40d02ec3914636 Mon Sep 17 00:00:00 2001 +From: Julian Parkin <jparkin@amd.com> +Date: Tue, 13 Mar 2018 15:53:13 -0400 +Subject: [PATCH 3931/4131] drm/amd/display: drop dc_validate_guaranteed + +Block FP16 scaling in validate_resources codepath. + +Signed-off-by: Julian Parkin <jparkin@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 32 -------------- + drivers/gpu/drm/amd/display/dc/dc_stream.h | 8 ---- + .../drm/amd/display/dc/dce100/dce100_resource.c | 33 --------------- + .../drm/amd/display/dc/dce110/dce110_resource.c | 33 --------------- + .../drm/amd/display/dc/dce112/dce112_resource.c | 33 --------------- + .../drm/amd/display/dc/dce112/dce112_resource.h | 5 --- + .../drm/amd/display/dc/dce120/dce120_resource.c | 1 - + .../gpu/drm/amd/display/dc/dce80/dce80_resource.c | 49 ---------------------- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 7 ++++ + .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 31 -------------- + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 5 --- + drivers/gpu/drm/amd/display/dc/inc/resource.h | 4 -- + 12 files changed, 7 insertions(+), 234 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +index ba3487e..cae78ee 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +@@ -1599,18 +1599,6 @@ enum dc_status dc_remove_stream_from_ctx( + return DC_OK; + } + +-static void copy_pipe_ctx( +- const struct pipe_ctx *from_pipe_ctx, struct pipe_ctx *to_pipe_ctx) +-{ +- struct dc_plane_state *plane_state = to_pipe_ctx->plane_state; +- struct dc_stream_state *stream = to_pipe_ctx->stream; +- +- *to_pipe_ctx = *from_pipe_ctx; +- to_pipe_ctx->stream = stream; +- if (plane_state != NULL) +- to_pipe_ctx->plane_state = plane_state; +-} +- + static struct dc_stream_state *find_pll_sharable_stream( + struct dc_stream_state *stream_needs_pll, + struct dc_state *context) +@@ -1752,26 +1740,6 @@ enum dc_status resource_map_pool_resources( + return DC_ERROR_UNEXPECTED; + } + +-/* first stream in the context is used to populate the rest */ +-void validate_guaranteed_copy_streams( +- struct dc_state *context, +- int max_streams) +-{ +- int i; +- +- for (i = 1; i < max_streams; i++) { +- context->streams[i] = context->streams[0]; +- +- copy_pipe_ctx(&context->res_ctx.pipe_ctx[0], +- &context->res_ctx.pipe_ctx[i]); +- context->res_ctx.pipe_ctx[i].stream = +- context->res_ctx.pipe_ctx[0].stream; +- +- dc_stream_retain(context->streams[i]); +- context->stream_count++; +- } +-} +- + void dc_resource_state_copy_construct_current( + const struct dc *dc, + struct dc_state *dst_ctx) +diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h +index d017df5..3a7093e 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h ++++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h +@@ -209,14 +209,6 @@ bool dc_add_all_planes_for_stream( + enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); + + /* +- * This function takes a stream and checks if it is guaranteed to be supported. +- * Guaranteed means that MAX_COFUNC similar streams are supported. +- * +- * After this call: +- * No hardware is programmed for call. Only validation is done. +- */ +- +-/* + * Set up streams and links associated to drive sinks + * The streams parameter is an absolute set of all active streams. + * +diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +index 3092f76..38ec0d6 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +@@ -733,38 +733,6 @@ enum dc_status dce100_add_stream_to_ctx( + return result; + } + +-enum dc_status dce100_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *dc_stream, +- struct dc_state *context) +-{ +- enum dc_status result = DC_ERROR_UNEXPECTED; +- +- context->streams[0] = dc_stream; +- dc_stream_retain(context->streams[0]); +- context->stream_count++; +- +- result = resource_map_pool_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = resource_map_clock_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = build_mapped_resource(dc, context, dc_stream); +- +- if (result == DC_OK) { +- validate_guaranteed_copy_streams( +- context, dc->caps.max_streams); +- result = resource_build_scaling_params_for_context(dc, context); +- } +- +- if (result == DC_OK) +- if (!dce100_validate_bandwidth(dc, context)) +- result = DC_FAIL_BANDWIDTH_VALIDATE; +- +- return result; +-} +- + static void dce100_destroy_resource_pool(struct resource_pool **pool) + { + struct dce110_resource_pool *dce110_pool = TO_DCE110_RES_POOL(*pool); +@@ -786,7 +754,6 @@ enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, s + static const struct resource_funcs dce100_res_pool_funcs = { + .destroy = dce100_destroy_resource_pool, + .link_enc_create = dce100_link_encoder_create, +- .validate_guaranteed = dce100_validate_guaranteed, + .validate_bandwidth = dce100_validate_bandwidth, + .validate_plane = dce100_validate_plane, + .add_stream_to_ctx = dce100_add_stream_to_ctx, +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +index b1f14be..ee33786 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +@@ -930,38 +930,6 @@ static enum dc_status dce110_add_stream_to_ctx( + return result; + } + +-static enum dc_status dce110_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *dc_stream, +- struct dc_state *context) +-{ +- enum dc_status result = DC_ERROR_UNEXPECTED; +- +- context->streams[0] = dc_stream; +- dc_stream_retain(context->streams[0]); +- context->stream_count++; +- +- result = resource_map_pool_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = resource_map_clock_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = build_mapped_resource(dc, context, dc_stream); +- +- if (result == DC_OK) { +- validate_guaranteed_copy_streams( +- context, dc->caps.max_streams); +- result = resource_build_scaling_params_for_context(dc, context); +- } +- +- if (result == DC_OK) +- if (!dce110_validate_bandwidth(dc, context)) +- result = DC_FAIL_BANDWIDTH_VALIDATE; +- +- return result; +-} +- + static struct pipe_ctx *dce110_acquire_underlay( + struct dc_state *context, + const struct resource_pool *pool, +@@ -1036,7 +1004,6 @@ static void dce110_destroy_resource_pool(struct resource_pool **pool) + static const struct resource_funcs dce110_res_pool_funcs = { + .destroy = dce110_destroy_resource_pool, + .link_enc_create = dce110_link_encoder_create, +- .validate_guaranteed = dce110_validate_guaranteed, + .validate_bandwidth = dce110_validate_bandwidth, + .validate_plane = dce110_validate_plane, + .acquire_idle_pipe_for_layer = dce110_acquire_underlay, +diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +index cd1e3f7..0a47663 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +@@ -867,38 +867,6 @@ enum dc_status dce112_add_stream_to_ctx( + return result; + } + +-enum dc_status dce112_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *stream, +- struct dc_state *context) +-{ +- enum dc_status result = DC_ERROR_UNEXPECTED; +- +- context->streams[0] = stream; +- dc_stream_retain(context->streams[0]); +- context->stream_count++; +- +- result = resource_map_pool_resources(dc, context, stream); +- +- if (result == DC_OK) +- result = resource_map_phy_clock_resources(dc, context, stream); +- +- if (result == DC_OK) +- result = build_mapped_resource(dc, context, stream); +- +- if (result == DC_OK) { +- validate_guaranteed_copy_streams( +- context, dc->caps.max_streams); +- result = resource_build_scaling_params_for_context(dc, context); +- } +- +- if (result == DC_OK) +- if (!dce112_validate_bandwidth(dc, context)) +- result = DC_FAIL_BANDWIDTH_VALIDATE; +- +- return result; +-} +- + enum dc_status dce112_validate_global( + struct dc *dc, + struct dc_state *context) +@@ -921,7 +889,6 @@ static void dce112_destroy_resource_pool(struct resource_pool **pool) + static const struct resource_funcs dce112_res_pool_funcs = { + .destroy = dce112_destroy_resource_pool, + .link_enc_create = dce112_link_encoder_create, +- .validate_guaranteed = dce112_validate_guaranteed, + .validate_bandwidth = dce112_validate_bandwidth, + .validate_plane = dce100_validate_plane, + .add_stream_to_ctx = dce112_add_stream_to_ctx, +diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h +index d5c19d3..95a4033 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h ++++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h +@@ -42,11 +42,6 @@ enum dc_status dce112_validate_with_context( + struct dc_state *context, + struct dc_state *old_context); + +-enum dc_status dce112_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *dc_stream, +- struct dc_state *context); +- + bool dce112_validate_bandwidth( + struct dc *dc, + struct dc_state *context); +diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c +index 4659a4b..567e6b4 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c +@@ -684,7 +684,6 @@ static void dce120_destroy_resource_pool(struct resource_pool **pool) + static const struct resource_funcs dce120_res_pool_funcs = { + .destroy = dce120_destroy_resource_pool, + .link_enc_create = dce120_link_encoder_create, +- .validate_guaranteed = dce112_validate_guaranteed, + .validate_bandwidth = dce112_validate_bandwidth, + .validate_plane = dce100_validate_plane, + .add_stream_to_ctx = dce112_add_stream_to_ctx +diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +index 5d854a3..48a0689 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +@@ -691,23 +691,6 @@ static void destruct(struct dce110_resource_pool *pool) + } + } + +-static enum dc_status build_mapped_resource( +- const struct dc *dc, +- struct dc_state *context, +- struct dc_stream_state *stream) +-{ +- struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); +- +- if (!pipe_ctx) +- return DC_ERROR_UNEXPECTED; +- +- dce110_resource_build_pipe_hw_param(pipe_ctx); +- +- resource_build_info_frame(pipe_ctx); +- +- return DC_OK; +-} +- + bool dce80_validate_bandwidth( + struct dc *dc, + struct dc_state *context) +@@ -749,37 +732,6 @@ enum dc_status dce80_validate_global( + return DC_OK; + } + +-enum dc_status dce80_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *dc_stream, +- struct dc_state *context) +-{ +- enum dc_status result = DC_ERROR_UNEXPECTED; +- +- context->streams[0] = dc_stream; +- dc_stream_retain(context->streams[0]); +- context->stream_count++; +- +- result = resource_map_pool_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = resource_map_clock_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = build_mapped_resource(dc, context, dc_stream); +- +- if (result == DC_OK) { +- validate_guaranteed_copy_streams( +- context, dc->caps.max_streams); +- result = resource_build_scaling_params_for_context(dc, context); +- } +- +- if (result == DC_OK) +- result = dce80_validate_bandwidth(dc, context); +- +- return result; +-} +- + static void dce80_destroy_resource_pool(struct resource_pool **pool) + { + struct dce110_resource_pool *dce110_pool = TO_DCE110_RES_POOL(*pool); +@@ -792,7 +744,6 @@ static void dce80_destroy_resource_pool(struct resource_pool **pool) + static const struct resource_funcs dce80_res_pool_funcs = { + .destroy = dce80_destroy_resource_pool, + .link_enc_create = dce80_link_encoder_create, +- .validate_guaranteed = dce80_validate_guaranteed, + .validate_bandwidth = dce80_validate_bandwidth, + .validate_plane = dce100_validate_plane, + .add_stream_to_ctx = dce100_add_stream_to_ctx, +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +index 3356125..5f40a73 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +@@ -121,6 +121,13 @@ bool dpp_get_optimal_number_of_taps( + else + pixel_width = scl_data->viewport.width; + ++ /* Some ASICs does not support FP16 scaling, so we reject modes require this*/ ++ if (scl_data->viewport.width != scl_data->h_active && ++ scl_data->viewport.height != scl_data->v_active && ++ dpp->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT && ++ scl_data->format == PIXEL_FORMAT_FP16) ++ return false; ++ + /* TODO: add lb check */ + + /* No support for programming ratio of 4, drop to 3.99999.. */ +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +index 02bd664..a3fe343 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +@@ -918,36 +918,6 @@ enum dc_status dcn10_add_stream_to_ctx( + return result; + } + +-enum dc_status dcn10_validate_guaranteed( +- struct dc *dc, +- struct dc_stream_state *dc_stream, +- struct dc_state *context) +-{ +- enum dc_status result = DC_ERROR_UNEXPECTED; +- +- context->streams[0] = dc_stream; +- dc_stream_retain(context->streams[0]); +- context->stream_count++; +- +- result = resource_map_pool_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = resource_map_phy_clock_resources(dc, context, dc_stream); +- +- if (result == DC_OK) +- result = build_mapped_resource(dc, context, dc_stream); +- +- if (result == DC_OK) { +- validate_guaranteed_copy_streams( +- context, dc->caps.max_streams); +- result = resource_build_scaling_params_for_context(dc, context); +- } +- if (result == DC_OK && !dcn_validate_bandwidth(dc, context)) +- return DC_FAIL_BANDWIDTH_VALIDATE; +- +- return result; +-} +- + static struct pipe_ctx *dcn10_acquire_idle_pipe_for_layer( + struct dc_state *context, + const struct resource_pool *pool, +@@ -1233,7 +1203,6 @@ static struct dc_cap_funcs cap_funcs = { + static struct resource_funcs dcn10_res_pool_funcs = { + .destroy = dcn10_destroy_resource_pool, + .link_enc_create = dcn10_link_encoder_create, +- .validate_guaranteed = dcn10_validate_guaranteed, + .validate_bandwidth = dcn_validate_bandwidth, + .acquire_idle_pipe_for_layer = dcn10_acquire_idle_pipe_for_layer, + .validate_plane = dcn10_validate_plane, +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +index 55f56bf..a94942d 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +@@ -95,11 +95,6 @@ struct resource_funcs { + struct link_encoder *(*link_enc_create)( + const struct encoder_init_data *init); + +- enum dc_status (*validate_guaranteed)( +- struct dc *dc, +- struct dc_stream_state *stream, +- struct dc_state *context); +- + bool (*validate_bandwidth)( + struct dc *dc, + struct dc_state *context); +diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h +index 5467332f..640a647 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h +@@ -139,10 +139,6 @@ bool resource_validate_attach_surfaces( + struct dc_state *context, + const struct resource_pool *pool); + +-void validate_guaranteed_copy_streams( +- struct dc_state *context, +- int max_streams); +- + void resource_validate_ctx_update_pointer_after_copy( + const struct dc_state *src_ctx, + struct dc_state *dst_ctx); +-- +2.7.4 + |