diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3884-drm-amdgpu-soc15-add-support-for-vega12.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3884-drm-amdgpu-soc15-add-support-for-vega12.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3884-drm-amdgpu-soc15-add-support-for-vega12.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3884-drm-amdgpu-soc15-add-support-for-vega12.patch new file mode 100644 index 00000000..598dd035 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3884-drm-amdgpu-soc15-add-support-for-vega12.patch @@ -0,0 +1,49 @@ +From ad24786090b8f0499642987261eb5650c99ad084 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Tue, 6 Mar 2018 22:35:19 -0500 +Subject: [PATCH 3884/4131] drm/amdgpu/soc15: add support for vega12 + +Add the IP blocks, clock and powergating flags, and +common clockgating support. + +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c +index 242c30b..91b0ef5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -527,6 +527,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + + switch (adev->asic_type) { + case CHIP_VEGA10: ++ case CHIP_VEGA12: + amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); + amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); +@@ -651,6 +652,11 @@ static int soc15_common_early_init(void *handle) + adev->pg_flags = 0; + adev->external_rev_id = 0x1; + break; ++ case CHIP_VEGA12: ++ adev->cg_flags = 0; ++ adev->pg_flags = 0; ++ adev->external_rev_id = 0x1; /* ??? */ ++ break; + case CHIP_RAVEN: + adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | + AMD_CG_SUPPORT_GFX_MGLS | +@@ -883,6 +889,7 @@ static int soc15_common_set_clockgating_state(void *handle, + + switch (adev->asic_type) { + case CHIP_VEGA10: ++ case CHIP_VEGA12: + adev->nbio_funcs->update_medium_grain_clock_gating(adev, + state == AMD_CG_STATE_GATE ? true : false); + adev->nbio_funcs->update_medium_grain_light_sleep(adev, +-- +2.7.4 + |