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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3867-drm-amd-display-dm-add-vega12-support.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3867-drm-amd-display-dm-add-vega12-support.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3867-drm-amd-display-dm-add-vega12-support.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3867-drm-amd-display-dm-add-vega12-support.patch
new file mode 100644
index 00000000..a8697c9e
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3867-drm-amd-display-dm-add-vega12-support.patch
@@ -0,0 +1,53 @@
+From f33ef2adc00bbea7db62f24c36cb026a97b71369 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Sat, 2 Sep 2017 02:01:55 -0400
+Subject: [PATCH 3867/4131] drm/amd/display/dm: add vega12 support
+
+Add support for vega12 to the display manager.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
+Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index 97cceb8..7de151b 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -1132,6 +1132,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)
+ unsigned client_id = AMDGPU_IH_CLIENTID_LEGACY;
+
+ if (adev->asic_type == CHIP_VEGA10 ||
++ adev->asic_type == CHIP_VEGA12 ||
+ adev->asic_type == CHIP_RAVEN)
+ client_id = SOC15_IH_CLIENTID_DCE;
+
+@@ -1503,6 +1504,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
+ case CHIP_POLARIS10:
+ case CHIP_POLARIS12:
+ case CHIP_VEGA10:
++ case CHIP_VEGA12:
+ if (dce110_register_irq_handlers(dm->adev)) {
+ DRM_ERROR("DM: Failed to initialize IRQ\n");
+ goto fail;
+@@ -1705,6 +1707,7 @@ static int dm_early_init(void *handle)
+ adev->mode_info.plane_type = dm_plane_type_default;
+ break;
+ case CHIP_VEGA10:
++ case CHIP_VEGA12:
+ adev->mode_info.num_crtc = 6;
+ adev->mode_info.num_hpd = 6;
+ adev->mode_info.num_dig = 6;
+@@ -1952,6 +1955,7 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
+ AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
+
+ if (adev->asic_type == CHIP_VEGA10 ||
++ adev->asic_type == CHIP_VEGA12 ||
+ adev->asic_type == CHIP_RAVEN) {
+ /* Fill GFX9 params */
+ plane_state->tiling_info.gfx9.num_pipes =
+--
+2.7.4
+