diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3769-drm-amd-display-Use-actual-TG-instance-instead-of-pi.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3769-drm-amd-display-Use-actual-TG-instance-instead-of-pi.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3769-drm-amd-display-Use-actual-TG-instance-instead-of-pi.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3769-drm-amd-display-Use-actual-TG-instance-instead-of-pi.patch new file mode 100644 index 00000000..e3a111f3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3769-drm-amd-display-Use-actual-TG-instance-instead-of-pi.patch @@ -0,0 +1,67 @@ +From c40a45becd22e8b33ba0caae7509e343c2fb65e4 Mon Sep 17 00:00:00 2001 +From: "Jerry (Fangzhi) Zuo" <Jerry.Zuo@amd.com> +Date: Fri, 2 Mar 2018 13:35:53 -0500 +Subject: [PATCH 3769/4131] drm/amd/display: Use actual TG instance instead of + pipe instance + +Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c | 10 +++++----- + drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c +index 4b8e7ce..4877243 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c +@@ -56,7 +56,7 @@ void dce_pipe_control_lock(struct dc *dc, + if (lock && pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) + return; + +- val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->pipe_idx], ++ val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], + BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph, + BLND_SCL_V_UPDATE_LOCK, &scl, + BLND_BLND_V_UPDATE_LOCK, &blnd, +@@ -67,19 +67,19 @@ void dce_pipe_control_lock(struct dc *dc, + blnd = lock_val; + update_lock_mode = lock_val; + +- REG_SET_2(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val, ++ REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, + BLND_DCP_GRPH_V_UPDATE_LOCK, dcp_grph, + BLND_SCL_V_UPDATE_LOCK, scl); + + if (hws->masks->BLND_BLND_V_UPDATE_LOCK != 0) +- REG_SET_2(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val, ++ REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, + BLND_BLND_V_UPDATE_LOCK, blnd, + BLND_V_UPDATE_LOCK_MODE, update_lock_mode); + + if (hws->wa.blnd_crtc_trigger) { + if (!lock) { +- uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->pipe_idx]); +- REG_WRITE(CRTC_H_BLANK_START_END[pipe->pipe_idx], value); ++ uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); ++ REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); + } + } + } +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 206569e..3e9cd1b 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -1132,7 +1132,7 @@ static void build_audio_output( + static void get_surface_visual_confirm_color(const struct pipe_ctx *pipe_ctx, + struct tg_color *color) + { +- uint32_t color_value = MAX_TG_COLOR_VALUE * (4 - pipe_ctx->pipe_idx) / 4; ++ uint32_t color_value = MAX_TG_COLOR_VALUE * (4 - pipe_ctx->stream_res.tg->inst) / 4; + + switch (pipe_ctx->plane_res.scl_data.format) { + case PIXEL_FORMAT_ARGB8888: +-- +2.7.4 + |