diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3740-drm-amd-amdgpu-creating-two-I2S-instances-for-stoney.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3740-drm-amd-amdgpu-creating-two-I2S-instances-for-stoney.patch | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3740-drm-amd-amdgpu-creating-two-I2S-instances-for-stoney.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3740-drm-amd-amdgpu-creating-two-I2S-instances-for-stoney.patch new file mode 100644 index 00000000..afcddd06 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3740-drm-amd-amdgpu-creating-two-I2S-instances-for-stoney.patch @@ -0,0 +1,113 @@ +From 88e88bca7aae325e6a299b1a38bbd8e0df681374 Mon Sep 17 00:00:00 2001 +From: Vijendar Mukunda <Vijendar.Mukunda@amd.com> +Date: Fri, 16 Feb 2018 14:14:03 +0530 +Subject: [PATCH 3740/4131] drm/amd/amdgpu: creating two I2S instances for + stoney/cz + +Creating two I2S instances for Stoney/cz platforms. + +Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> +Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Kalyan Alle <kalyan.alle@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 40 +++++++++++++++++++++++++-------- + 1 file changed, 31 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +index bdec5c7..c626865 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +@@ -57,6 +57,10 @@ + #define ACP_I2S_COMP2_CAP_REG_OFFSET 0xa8 + #define ACP_I2S_COMP1_PLAY_REG_OFFSET 0x6c + #define ACP_I2S_COMP2_PLAY_REG_OFFSET 0x68 ++#define ACP_BT_PLAY_REGS_START 0x14970 ++#define ACP_BT_PLAY_REGS_END 0x14a24 ++#define ACP_BT_COMP1_REG_OFFSET 0xac ++#define ACP_BT_COMP2_REG_OFFSET 0xa8 + + #define mmACP_PGFSM_RETAIN_REG 0x51c9 + #define mmACP_PGFSM_CONFIG_REG 0x51ca +@@ -77,7 +81,7 @@ + #define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x000000FF + + #define ACP_TIMEOUT_LOOP 0x000000FF +-#define ACP_DEVS 3 ++#define ACP_DEVS 4 + #define ACP_SRC_ID 162 + + enum { +@@ -317,14 +321,14 @@ static int acp_hw_init(void *handle) + if (adev->acp.acp_cell == NULL) + return -ENOMEM; + +- adev->acp.acp_res = kzalloc(sizeof(struct resource) * 4, GFP_KERNEL); ++ adev->acp.acp_res = kzalloc(sizeof(struct resource) * 5, GFP_KERNEL); + + if (adev->acp.acp_res == NULL) { + kfree(adev->acp.acp_cell); + return -ENOMEM; + } + +- i2s_pdata = kzalloc(sizeof(struct i2s_platform_data) * 2, GFP_KERNEL); ++ i2s_pdata = kzalloc(sizeof(struct i2s_platform_data) * 3, GFP_KERNEL); + if (i2s_pdata == NULL) { + kfree(adev->acp.acp_res); + kfree(adev->acp.acp_cell); +@@ -358,6 +362,20 @@ static int acp_hw_init(void *handle) + i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000; + i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; + i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; ++ ++ i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; ++ switch (adev->asic_type) { ++ case CHIP_STONEY: ++ i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; ++ break; ++ default: ++ break; ++ } ++ ++ i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD; ++ i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000; ++ i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET; ++ i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET; + + adev->acp.acp_res[0].name = "acp2x_dma"; + adev->acp.acp_res[0].flags = IORESOURCE_MEM; +@@ -374,13 +392,18 @@ static int acp_hw_init(void *handle) + adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; + adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; + +- adev->acp.acp_res[3].name = "acp2x_dma_irq"; +- adev->acp.acp_res[3].flags = IORESOURCE_IRQ; +- adev->acp.acp_res[3].start = amdgpu_irq_create_mapping(adev, 162); +- adev->acp.acp_res[3].end = adev->acp.acp_res[3].start; ++ adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap"; ++ adev->acp.acp_res[3].flags = IORESOURCE_MEM; ++ adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START; ++ adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END; ++ ++ adev->acp.acp_res[4].name = "acp2x_dma_irq"; ++ adev->acp.acp_res[4].flags = IORESOURCE_IRQ; ++ adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); ++ adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; + + adev->acp.acp_cell[0].name = "acp_audio_dma"; +- adev->acp.acp_cell[0].num_resources = 4; ++ adev->acp.acp_cell[0].num_resources = 6; + adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; + adev->acp.acp_cell[0].platform_data = &adev->asic_type; + adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); +@@ -452,7 +475,6 @@ static int acp_hw_init(void *handle) + val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); + val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; + cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); +- + return 0; + } + +-- +2.7.4 + |