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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3724-drm-ttm-add-operation-ctx-to-ttm_bo_validate-v2.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3724-drm-ttm-add-operation-ctx-to-ttm_bo_validate-v2.patch1049
1 files changed, 1049 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3724-drm-ttm-add-operation-ctx-to-ttm_bo_validate-v2.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3724-drm-ttm-add-operation-ctx-to-ttm_bo_validate-v2.patch
new file mode 100644
index 00000000..dd2534ad
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3724-drm-ttm-add-operation-ctx-to-ttm_bo_validate-v2.patch
@@ -0,0 +1,1049 @@
+From 2ba3760b568ebd1bbe1109908a48029481422eed Mon Sep 17 00:00:00 2001
+From: Christian Koenig <christian.koenig@amd.com>
+Date: Wed, 12 Apr 2017 14:24:39 +0200
+Subject: [PATCH 3724/4131] drm/ttm: add operation ctx to ttm_bo_validate v2
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Give moving a BO into place an operation context to work with.
+
+v2: rebased
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
+Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
+Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
+Tested-by: Michel Dänzer <michel.daenzer@amd.com>
+Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++++++++------
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 ++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++++----
+ drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 ++++--
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 3 ++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 1 +
+ drivers/gpu/drm/ast/ast_ttm.c | 9 ++++++---
+ drivers/gpu/drm/bochs/bochs_mm.c | 6 ++++--
+ drivers/gpu/drm/cirrus/cirrus_ttm.c | 6 ++++--
+ drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 6 ++++--
+ drivers/gpu/drm/mgag200/mgag200_ttm.c | 9 ++++++---
+ drivers/gpu/drm/nouveau/nouveau_bo.c | 4 ++--
+ drivers/gpu/drm/qxl/qxl_ioctl.c | 4 ++--
+ drivers/gpu/drm/qxl/qxl_object.c | 6 ++++--
+ drivers/gpu/drm/qxl/qxl_release.c | 4 ++--
+ drivers/gpu/drm/radeon/radeon_gem.c | 3 ++-
+ drivers/gpu/drm/radeon/radeon_mn.c | 3 ++-
+ drivers/gpu/drm/radeon/radeon_object.c | 14 +++++++++-----
+ drivers/gpu/drm/radeon/radeon_vm.c | 3 ++-
+ drivers/gpu/drm/ttm/ttm_bo.c | 16 +++++++++-------
+ drivers/gpu/drm/virtio/virtgpu_ioctl.c | 11 ++++++-----
+ drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c | 3 ++-
+ drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c | 21 +++++++++++++--------
+ drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 9 ++++-----
+ drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 6 ++++--
+ drivers/gpu/drm/vmwgfx/vmwgfx_shader.c | 3 ++-
+ 26 files changed, 114 insertions(+), 71 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+index 9e9a299..5ebe000 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+@@ -343,6 +343,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
+ struct amdgpu_bo *bo)
+ {
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
++ struct ttm_operation_ctx ctx = { true, false };
+ u64 initial_bytes_moved, bytes_moved;
+ uint32_t domain;
+ int r;
+@@ -374,7 +375,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
+ retry:
+ amdgpu_ttm_placement_from_domain(bo, domain);
+ initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ bytes_moved = atomic64_read(&adev->num_bytes_moved) -
+ initial_bytes_moved;
+ p->bytes_moved += bytes_moved;
+@@ -397,6 +398,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
+ struct amdgpu_bo *validated)
+ {
+ uint32_t domain = validated->allowed_domains;
++ struct ttm_operation_ctx ctx = { true, false };
+ int r;
+
+ if (!p->evictable)
+@@ -438,7 +440,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
+ bo->tbo.mem.mem_type == TTM_PL_VRAM &&
+ bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT;
+ initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ bytes_moved = atomic64_read(&adev->num_bytes_moved) -
+ initial_bytes_moved;
+ p->bytes_moved += bytes_moved;
+@@ -477,6 +479,7 @@ static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
+ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
+ struct list_head *validated)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct amdgpu_bo_list_entry *lobj;
+ int r;
+
+@@ -494,8 +497,7 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
+ lobj->user_pages) {
+ amdgpu_ttm_placement_from_domain(bo,
+ AMDGPU_GEM_DOMAIN_CPU);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true,
+- false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (r)
+ return r;
+ amdgpu_ttm_tt_set_user_pages(bo->tbo.ttm,
+@@ -1578,6 +1580,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
+ struct amdgpu_bo_va_mapping **map)
+ {
+ struct amdgpu_fpriv *fpriv = parser->filp->driver_priv;
++ struct ttm_operation_ctx ctx = { false, false };
+ struct amdgpu_vm *vm = &fpriv->vm;
+ struct amdgpu_bo_va_mapping *mapping;
+ int r;
+@@ -1598,8 +1601,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
+ if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {
+ (*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
+ amdgpu_ttm_placement_from_domain(*bo, (*bo)->allowed_domains);
+- r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, false,
+- false);
++ r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);
+ if (r)
+ return r;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+index 81c6748..ea2162f 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+@@ -397,6 +397,7 @@ int amdgpu_gem_find_bo_by_cpu_mapping_ioctl(struct drm_device *dev, void *data,
+ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct amdgpu_device *adev = dev->dev_private;
+ struct drm_amdgpu_gem_userptr *args = data;
+ struct drm_gem_object *gobj;
+@@ -450,7 +451,7 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
+ goto free_pages;
+
+ amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ amdgpu_bo_unreserve(bo);
+ if (r)
+ goto free_pages;
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+index 0b85e49..d39dada 100755
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -588,6 +588,7 @@ int amdgpu_bo_backup_to_shadow(struct amdgpu_device *adev,
+
+ int amdgpu_bo_validate(struct amdgpu_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ uint32_t domain;
+ int r;
+
+@@ -598,7 +599,7 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
+
+ retry:
+ amdgpu_ttm_placement_from_domain(bo, domain);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
+ domain = bo->allowed_domains;
+ goto retry;
+@@ -709,6 +710,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
+ u64 *gpu_addr)
+ {
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
++ struct ttm_operation_ctx ctx = { false, false };
+ int r, i;
+
+ if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))
+@@ -763,7 +765,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+ }
+
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (unlikely(r)) {
+ dev_err(adev->dev, "%p pin failed\n", bo);
+ goto error;
+@@ -799,6 +801,7 @@ int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain, u64 *gpu_addr)
+ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
+ {
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
++ struct ttm_operation_ctx ctx = { false, false };
+ int r, i;
+
+ if (!bo->pin_count) {
+@@ -812,7 +815,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
+ bo->placements[i].lpfn = 0;
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+ }
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (unlikely(r)) {
+ dev_err(adev->dev, "%p validate failed for unpin\n", bo);
+ goto error;
+@@ -984,6 +987,7 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
+ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
+ {
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
++ struct ttm_operation_ctx ctx = { false, false };
+ struct amdgpu_bo *abo;
+ unsigned long offset, size;
+ int r;
+@@ -1017,7 +1021,7 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
+ abo->placement.num_busy_placement = 1;
+ abo->placement.busy_placement = &abo->placements[1];
+
+- r = ttm_bo_validate(bo, &abo->placement, false, false);
++ r = ttm_bo_validate(bo, &abo->placement, &ctx);
+ if (unlikely(r != 0))
+ return r;
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+index 893daeb14..5635abe 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+@@ -412,6 +412,7 @@ static u64 amdgpu_uvd_get_addr_from_ctx(struct amdgpu_uvd_cs_ctx *ctx)
+ */
+ static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx)
+ {
++ struct ttm_operation_ctx tctx = { false, false };
+ struct amdgpu_bo_va_mapping *mapping;
+ struct amdgpu_bo *bo;
+ uint32_t cmd;
+@@ -434,7 +435,7 @@ static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx)
+ }
+ amdgpu_uvd_force_into_uvd_segment(bo);
+
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &tctx);
+ }
+
+ return r;
+@@ -953,6 +954,7 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
+ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
+ bool direct, struct dma_fence **fence)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct amdgpu_device *adev = ring->adev;
+ struct dma_fence *f = NULL;
+ struct amdgpu_job *job;
+@@ -968,7 +970,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
+ if (!ring->adev->uvd.address_64_bit) {
+ amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
+ amdgpu_uvd_force_into_uvd_segment(bo);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (r)
+ goto err;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+index c034b63..9152478 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+@@ -556,6 +556,7 @@ static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx,
+ int lo, int hi, unsigned size, int32_t index)
+ {
+ int64_t offset = ((uint64_t)size) * ((int64_t)index);
++ struct ttm_operation_ctx ctx = { false, false };
+ struct amdgpu_bo_va_mapping *mapping;
+ unsigned i, fpfn, lpfn;
+ struct amdgpu_bo *bo;
+@@ -585,7 +586,7 @@ static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx,
+ bo->placements[i].lpfn = bo->placements[i].lpfn ?
+ min(bo->placements[i].lpfn, lpfn) : lpfn;
+ }
+- return ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ }
+
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+index 5953fdd..8f32b8d 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+@@ -278,6 +278,7 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
+ struct amdgpu_bo *bo, bool direct,
+ struct dma_fence **fence)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct amdgpu_device *adev = ring->adev;
+ struct dma_fence *f = NULL;
+ struct amdgpu_job *job;
+diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c
+index aa15ddd..c864bb4 100644
+--- a/drivers/gpu/drm/ast/ast_ttm.c
++++ b/drivers/gpu/drm/ast/ast_ttm.c
+@@ -353,6 +353,7 @@ static inline u64 ast_bo_gpu_offset(struct ast_bo *bo)
+
+ int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (bo->pin_count) {
+@@ -364,7 +365,7 @@ int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ ast_ttm_placement(bo, pl_flag);
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+@@ -376,6 +377,7 @@ int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr)
+
+ int ast_bo_unpin(struct ast_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i;
+ if (!bo->pin_count) {
+ DRM_ERROR("unpin bad %p\n", bo);
+@@ -387,11 +389,12 @@ int ast_bo_unpin(struct ast_bo *bo)
+
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+- return ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ return ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ }
+
+ int ast_bo_push_sysram(struct ast_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+ if (!bo->pin_count) {
+ DRM_ERROR("unpin bad %p\n", bo);
+@@ -408,7 +411,7 @@ int ast_bo_push_sysram(struct ast_bo *bo)
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret) {
+ DRM_ERROR("pushing to VRAM failed\n");
+ return ret;
+diff --git a/drivers/gpu/drm/bochs/bochs_mm.c b/drivers/gpu/drm/bochs/bochs_mm.c
+index a31c673..e934b58 100644
+--- a/drivers/gpu/drm/bochs/bochs_mm.c
++++ b/drivers/gpu/drm/bochs/bochs_mm.c
+@@ -281,6 +281,7 @@ static inline u64 bochs_bo_gpu_offset(struct bochs_bo *bo)
+
+ int bochs_bo_pin(struct bochs_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (bo->pin_count) {
+@@ -293,7 +294,7 @@ int bochs_bo_pin(struct bochs_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ bochs_ttm_placement(bo, pl_flag);
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+@@ -305,6 +306,7 @@ int bochs_bo_pin(struct bochs_bo *bo, u32 pl_flag, u64 *gpu_addr)
+
+ int bochs_bo_unpin(struct bochs_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (!bo->pin_count) {
+@@ -318,7 +320,7 @@ int bochs_bo_unpin(struct bochs_bo *bo)
+
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c b/drivers/gpu/drm/cirrus/cirrus_ttm.c
+index 22d2646..cafa62d 100644
+--- a/drivers/gpu/drm/cirrus/cirrus_ttm.c
++++ b/drivers/gpu/drm/cirrus/cirrus_ttm.c
+@@ -357,6 +357,7 @@ static inline u64 cirrus_bo_gpu_offset(struct cirrus_bo *bo)
+
+ int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (bo->pin_count) {
+@@ -368,7 +369,7 @@ int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ cirrus_ttm_placement(bo, pl_flag);
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+@@ -380,6 +381,7 @@ int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr)
+
+ int cirrus_bo_push_sysram(struct cirrus_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+ if (!bo->pin_count) {
+ DRM_ERROR("unpin bad %p\n", bo);
+@@ -396,7 +398,7 @@ int cirrus_bo_push_sysram(struct cirrus_bo *bo)
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret) {
+ DRM_ERROR("pushing to VRAM failed\n");
+ return ret;
+diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+index 78eb23c..327d86e 100644
+--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
++++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+@@ -342,6 +342,7 @@ int hibmc_bo_create(struct drm_device *dev, int size, int align,
+
+ int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (bo->pin_count) {
+@@ -354,7 +355,7 @@ int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ hibmc_ttm_placement(bo, pl_flag);
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+@@ -366,6 +367,7 @@ int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr)
+
+ int hibmc_bo_unpin(struct hibmc_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (!bo->pin_count) {
+@@ -378,7 +380,7 @@ int hibmc_bo_unpin(struct hibmc_bo *bo)
+
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret) {
+ DRM_ERROR("validate failed for unpin: %d\n", ret);
+ return ret;
+diff --git a/drivers/gpu/drm/mgag200/mgag200_ttm.c b/drivers/gpu/drm/mgag200/mgag200_ttm.c
+index eece4e6..5120715 100644
+--- a/drivers/gpu/drm/mgag200/mgag200_ttm.c
++++ b/drivers/gpu/drm/mgag200/mgag200_ttm.c
+@@ -353,6 +353,7 @@ static inline u64 mgag200_bo_gpu_offset(struct mgag200_bo *bo)
+
+ int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+
+ if (bo->pin_count) {
+@@ -365,7 +366,7 @@ int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr)
+ mgag200_ttm_placement(bo, pl_flag);
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+
+@@ -377,6 +378,7 @@ int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr)
+
+ int mgag200_bo_unpin(struct mgag200_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i;
+ if (!bo->pin_count) {
+ DRM_ERROR("unpin bad %p\n", bo);
+@@ -388,11 +390,12 @@ int mgag200_bo_unpin(struct mgag200_bo *bo)
+
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+- return ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ return ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ }
+
+ int mgag200_bo_push_sysram(struct mgag200_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int i, ret;
+ if (!bo->pin_count) {
+ DRM_ERROR("unpin bad %p\n", bo);
+@@ -409,7 +412,7 @@ int mgag200_bo_push_sysram(struct mgag200_bo *bo)
+ for (i = 0; i < bo->placement.num_placement ; i++)
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+
+- ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
++ ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
+ if (ret) {
+ DRM_ERROR("pushing to VRAM failed\n");
+ return ret;
+diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
+index f620534..59f92c6 100644
+--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
++++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
+@@ -486,10 +486,10 @@ int
+ nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
+ bool no_wait_gpu)
+ {
++ struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
+ int ret;
+
+- ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
+- interruptible, no_wait_gpu);
++ ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
+ if (ret)
+ return ret;
+
+diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c
+index 31effed..e8c0b10 100644
+--- a/drivers/gpu/drm/qxl/qxl_ioctl.c
++++ b/drivers/gpu/drm/qxl/qxl_ioctl.c
+@@ -309,6 +309,7 @@ static int qxl_update_area_ioctl(struct drm_device *dev, void *data,
+ int ret;
+ struct drm_gem_object *gobj = NULL;
+ struct qxl_bo *qobj = NULL;
++ struct ttm_operation_ctx ctx = { true, false };
+
+ if (update_area->left >= update_area->right ||
+ update_area->top >= update_area->bottom)
+@@ -326,8 +327,7 @@ static int qxl_update_area_ioctl(struct drm_device *dev, void *data,
+
+ if (!qobj->pin_count) {
+ qxl_ttm_placement_from_domain(qobj, qobj->type, false);
+- ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
+- true, false);
++ ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
+ if (unlikely(ret))
+ goto out;
+ }
+diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c
+index 0a67ddf..f6b80fe 100644
+--- a/drivers/gpu/drm/qxl/qxl_object.c
++++ b/drivers/gpu/drm/qxl/qxl_object.c
+@@ -223,6 +223,7 @@ struct qxl_bo *qxl_bo_ref(struct qxl_bo *bo)
+
+ static int __qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ struct drm_device *ddev = bo->gem_base.dev;
+ int r;
+
+@@ -233,7 +234,7 @@ static int __qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
+ return 0;
+ }
+ qxl_ttm_placement_from_domain(bo, domain, true);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (likely(r == 0)) {
+ bo->pin_count = 1;
+ if (gpu_addr != NULL)
+@@ -246,6 +247,7 @@ static int __qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
+
+ static int __qxl_bo_unpin(struct qxl_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ struct drm_device *ddev = bo->gem_base.dev;
+ int r, i;
+
+@@ -258,7 +260,7 @@ static int __qxl_bo_unpin(struct qxl_bo *bo)
+ return 0;
+ for (i = 0; i < bo->placement.num_placement; i++)
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (unlikely(r != 0))
+ dev_err(ddev->dev, "%p validate failed for unpin\n", bo);
+ return r;
+diff --git a/drivers/gpu/drm/qxl/qxl_release.c b/drivers/gpu/drm/qxl/qxl_release.c
+index e6ec845..1f90d0e 100644
+--- a/drivers/gpu/drm/qxl/qxl_release.c
++++ b/drivers/gpu/drm/qxl/qxl_release.c
+@@ -231,12 +231,12 @@ int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
+
+ static int qxl_release_validate_bo(struct qxl_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ int ret;
+
+ if (!bo->pin_count) {
+ qxl_ttm_placement_from_domain(bo, bo->type, false);
+- ret = ttm_bo_validate(&bo->tbo, &bo->placement,
+- true, false);
++ ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (ret)
+ return ret;
+ }
+diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
+index ac467b8..2ff2a2d 100644
+--- a/drivers/gpu/drm/radeon/radeon_gem.c
++++ b/drivers/gpu/drm/radeon/radeon_gem.c
+@@ -283,6 +283,7 @@ int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
+ int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct radeon_device *rdev = dev->dev_private;
+ struct drm_radeon_gem_userptr *args = data;
+ struct drm_gem_object *gobj;
+@@ -341,7 +342,7 @@ int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
+ }
+
+ radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ radeon_bo_unreserve(bo);
+ up_read(&current->mm->mmap_sem);
+ if (r)
+diff --git a/drivers/gpu/drm/radeon/radeon_mn.c b/drivers/gpu/drm/radeon/radeon_mn.c
+index 1d62288..abd2497 100644
+--- a/drivers/gpu/drm/radeon/radeon_mn.c
++++ b/drivers/gpu/drm/radeon/radeon_mn.c
+@@ -124,6 +124,7 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn,
+ unsigned long end)
+ {
+ struct radeon_mn *rmn = container_of(mn, struct radeon_mn, mn);
++ struct ttm_operation_ctx ctx = { false, false };
+ struct interval_tree_node *it;
+
+ /* notification is exclusive, but interval is inclusive */
+@@ -157,7 +158,7 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn,
+ DRM_ERROR("(%ld) failed to wait for user bo\n", r);
+
+ radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (r)
+ DRM_ERROR("(%ld) failed to validate user bo\n", r);
+
+diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
+index b19a54d..5b6aecc 100644
+--- a/drivers/gpu/drm/radeon/radeon_object.c
++++ b/drivers/gpu/drm/radeon/radeon_object.c
+@@ -332,6 +332,7 @@ void radeon_bo_unref(struct radeon_bo **bo)
+ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
+ u64 *gpu_addr)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int r, i;
+
+ if (radeon_ttm_tt_has_userptr(bo->tbo.ttm))
+@@ -374,7 +375,7 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
+ bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
+ }
+
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (likely(r == 0)) {
+ bo->pin_count = 1;
+ if (gpu_addr != NULL)
+@@ -396,6 +397,7 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
+
+ int radeon_bo_unpin(struct radeon_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ int r, i;
+
+ if (!bo->pin_count) {
+@@ -409,7 +411,7 @@ int radeon_bo_unpin(struct radeon_bo *bo)
+ bo->placements[i].lpfn = 0;
+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
+ }
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (likely(r == 0)) {
+ if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
+ bo->rdev->vram_pin_size -= radeon_bo_size(bo);
+@@ -534,6 +536,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev,
+ struct ww_acquire_ctx *ticket,
+ struct list_head *head, int ring)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct radeon_bo_list *lobj;
+ struct list_head duplicates;
+ int r;
+@@ -575,7 +578,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev,
+ radeon_uvd_force_into_uvd_segment(bo, allowed);
+
+ initial_bytes_moved = atomic64_read(&rdev->num_bytes_moved);
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ bytes_moved += atomic64_read(&rdev->num_bytes_moved) -
+ initial_bytes_moved;
+
+@@ -795,6 +798,7 @@ void radeon_bo_move_notify(struct ttm_buffer_object *bo,
+
+ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ struct radeon_device *rdev;
+ struct radeon_bo *rbo;
+ unsigned long offset, size, lpfn;
+@@ -826,10 +830,10 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
+ (!rbo->placements[i].lpfn || rbo->placements[i].lpfn > lpfn))
+ rbo->placements[i].lpfn = lpfn;
+ }
+- r = ttm_bo_validate(bo, &rbo->placement, false, false);
++ r = ttm_bo_validate(bo, &rbo->placement, &ctx);
+ if (unlikely(r == -ENOMEM)) {
+ radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
+- return ttm_bo_validate(bo, &rbo->placement, false, false);
++ return ttm_bo_validate(bo, &rbo->placement, &ctx);
+ } else if (unlikely(r != 0)) {
+ return r;
+ }
+diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
+index e5c0e63..7f1a9c7 100644
+--- a/drivers/gpu/drm/radeon/radeon_vm.c
++++ b/drivers/gpu/drm/radeon/radeon_vm.c
+@@ -387,6 +387,7 @@ static void radeon_vm_set_pages(struct radeon_device *rdev,
+ static int radeon_vm_clear_bo(struct radeon_device *rdev,
+ struct radeon_bo *bo)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct radeon_ib ib;
+ unsigned entries;
+ uint64_t addr;
+@@ -396,7 +397,7 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,
+ if (r)
+ return r;
+
+- r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
++ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
+ if (r)
+ goto error_unreserve;
+
+diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
+index 51932c3..66a2183 100644
+--- a/drivers/gpu/drm/ttm/ttm_bo.c
++++ b/drivers/gpu/drm/ttm/ttm_bo.c
+@@ -1095,9 +1095,8 @@ bool ttm_bo_mem_compat(struct ttm_placement *placement,
+ EXPORT_SYMBOL(ttm_bo_mem_compat);
+
+ int ttm_bo_validate(struct ttm_buffer_object *bo,
+- struct ttm_placement *placement,
+- bool interruptible,
+- bool no_wait_gpu)
++ struct ttm_placement *placement,
++ struct ttm_operation_ctx *ctx)
+ {
+ int ret;
+ uint32_t new_flags;
+@@ -1107,8 +1106,8 @@ int ttm_bo_validate(struct ttm_buffer_object *bo,
+ * Check whether we need to move buffer.
+ */
+ if (!ttm_bo_mem_compat(placement, &bo->mem, &new_flags)) {
+- ret = ttm_bo_move_buffer(bo, placement, interruptible,
+- no_wait_gpu);
++ ret = ttm_bo_move_buffer(bo, placement, ctx->interruptible,
++ ctx->no_wait_gpu);
+ if (ret)
+ return ret;
+ } else {
+@@ -1223,8 +1222,11 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
+ WARN_ON(!locked);
+ }
+
+- if (likely(!ret))
+- ret = ttm_bo_validate(bo, placement, ctx);
++ if (likely(!ret)) {
++ struct ttm_operation_ctx ctx = { interruptible, false };
++
++ ret = ttm_bo_validate(bo, placement, &ctx);
++ }
+
+ if (unlikely(ret)) {
+ if (!resv)
+diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+index ed9c443..2fc08d3 100644
+--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
++++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+@@ -56,6 +56,7 @@ static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
+ static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
+ struct list_head *head)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ struct ttm_validate_buffer *buf;
+ struct ttm_buffer_object *bo;
+ struct virtio_gpu_object *qobj;
+@@ -68,7 +69,7 @@ static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
+ list_for_each_entry(buf, head, head) {
+ bo = buf->bo;
+ qobj = container_of(bo, struct virtio_gpu_object, tbo);
+- ret = ttm_bo_validate(bo, &qobj->placement, false, false);
++ ret = ttm_bo_validate(bo, &qobj->placement, &ctx);
+ if (ret) {
+ ttm_eu_backoff_reservation(ticket, head);
+ return ret;
+@@ -355,6 +356,7 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
+ struct virtio_gpu_device *vgdev = dev->dev_private;
+ struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
+ struct drm_virtgpu_3d_transfer_from_host *args = data;
++ struct ttm_operation_ctx ctx = { true, false };
+ struct drm_gem_object *gobj = NULL;
+ struct virtio_gpu_object *qobj = NULL;
+ struct virtio_gpu_fence *fence;
+@@ -375,8 +377,7 @@ static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
+ if (ret)
+ goto out;
+
+- ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
+- true, false);
++ ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
+ if (unlikely(ret))
+ goto out_unres;
+
+@@ -402,6 +403,7 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
+ struct virtio_gpu_device *vgdev = dev->dev_private;
+ struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
+ struct drm_virtgpu_3d_transfer_to_host *args = data;
++ struct ttm_operation_ctx ctx = { true, false };
+ struct drm_gem_object *gobj = NULL;
+ struct virtio_gpu_object *qobj = NULL;
+ struct virtio_gpu_fence *fence;
+@@ -419,8 +421,7 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
+ if (ret)
+ goto out;
+
+- ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
+- true, false);
++ ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
+ if (unlikely(ret))
+ goto out_unres;
+
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
+index d87861b..92df0b0 100644
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c
+@@ -387,6 +387,7 @@ static int vmw_cotable_readback(struct vmw_resource *res)
+ */
+ static int vmw_cotable_resize(struct vmw_resource *res, size_t new_size)
+ {
++ struct ttm_operation_ctx ctx = { false, false };
+ struct vmw_private *dev_priv = res->dev_priv;
+ struct vmw_cotable *vcotbl = vmw_cotable(res);
+ struct vmw_dma_buffer *buf, *old_buf = res->backup;
+@@ -455,7 +456,7 @@ static int vmw_cotable_resize(struct vmw_resource *res, size_t new_size)
+ }
+
+ /* Unpin new buffer, and switch backup buffers. */
+- ret = ttm_bo_validate(bo, &vmw_mob_placement, false, false);
++ ret = ttm_bo_validate(bo, &vmw_mob_placement, &ctx);
+ if (unlikely(ret != 0)) {
+ DRM_ERROR("Failed validating new COTable backup buffer.\n");
+ goto out_wait;
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
+index 0cd8890..d45d2ca 100644
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c
+@@ -47,6 +47,7 @@ int vmw_dmabuf_pin_in_placement(struct vmw_private *dev_priv,
+ struct ttm_placement *placement,
+ bool interruptible)
+ {
++ struct ttm_operation_ctx ctx = {interruptible, false };
+ struct ttm_buffer_object *bo = &buf->base;
+ int ret;
+ uint32_t new_flags;
+@@ -65,7 +66,7 @@ int vmw_dmabuf_pin_in_placement(struct vmw_private *dev_priv,
+ ret = ttm_bo_mem_compat(placement, &bo->mem,
+ &new_flags) == true ? 0 : -EINVAL;
+ else
+- ret = ttm_bo_validate(bo, placement, interruptible, false);
++ ret = ttm_bo_validate(bo, placement, &ctx);
+
+ if (!ret)
+ vmw_bo_pin_reserved(buf, true);
+@@ -95,6 +96,7 @@ int vmw_dmabuf_pin_in_vram_or_gmr(struct vmw_private *dev_priv,
+ struct vmw_dma_buffer *buf,
+ bool interruptible)
+ {
++ struct ttm_operation_ctx ctx = {interruptible, false };
+ struct ttm_buffer_object *bo = &buf->base;
+ int ret;
+ uint32_t new_flags;
+@@ -115,12 +117,11 @@ int vmw_dmabuf_pin_in_vram_or_gmr(struct vmw_private *dev_priv,
+ goto out_unreserve;
+ }
+
+- ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, interruptible,
+- false);
++ ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, &ctx);
+ if (likely(ret == 0) || ret == -ERESTARTSYS)
+ goto out_unreserve;
+
+- ret = ttm_bo_validate(bo, &vmw_vram_placement, interruptible, false);
++ ret = ttm_bo_validate(bo, &vmw_vram_placement, &ctx);
+
+ out_unreserve:
+ if (!ret)
+@@ -170,6 +171,7 @@ int vmw_dmabuf_pin_in_start_of_vram(struct vmw_private *dev_priv,
+ struct vmw_dma_buffer *buf,
+ bool interruptible)
+ {
++ struct ttm_operation_ctx ctx = {interruptible, false };
+ struct ttm_buffer_object *bo = &buf->base;
+ struct ttm_placement placement;
+ struct ttm_place place;
+@@ -200,14 +202,16 @@ int vmw_dmabuf_pin_in_start_of_vram(struct vmw_private *dev_priv,
+ if (bo->mem.mem_type == TTM_PL_VRAM &&
+ bo->mem.start < bo->num_pages &&
+ bo->mem.start > 0 &&
+- buf->pin_count == 0)
+- (void) ttm_bo_validate(bo, &vmw_sys_placement, false, false);
++ buf->pin_count == 0) {
++ ctx.interruptible = false;
++ (void) ttm_bo_validate(bo, &vmw_sys_placement, &ctx);
++ }
+
+ if (buf->pin_count > 0)
+ ret = ttm_bo_mem_compat(&placement, &bo->mem,
+ &new_flags) == true ? 0 : -EINVAL;
+ else
+- ret = ttm_bo_validate(bo, &placement, interruptible, false);
++ ret = ttm_bo_validate(bo, &placement, &ctx);
+
+ /* For some reason we didn't end up at the start of vram */
+ WARN_ON(ret == 0 && bo->offset != 0);
+@@ -286,6 +290,7 @@ void vmw_bo_get_guest_ptr(const struct ttm_buffer_object *bo,
+ */
+ void vmw_bo_pin_reserved(struct vmw_dma_buffer *vbo, bool pin)
+ {
++ struct ttm_operation_ctx ctx = { false, true };
+ struct ttm_place pl;
+ struct ttm_placement placement;
+ struct ttm_buffer_object *bo = &vbo->base;
+@@ -314,7 +319,7 @@ void vmw_bo_pin_reserved(struct vmw_dma_buffer *vbo, bool pin)
+ placement.num_placement = 1;
+ placement.placement = &pl;
+
+- ret = ttm_bo_validate(bo, &placement, false, true);
++ ret = ttm_bo_validate(bo, &placement, &ctx);
+
+ BUG_ON(ret != 0 || bo->mem.mem_type != old_mem_type);
+ }
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+index 87e8af5..c9d5cc2 100644
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+@@ -3703,14 +3703,14 @@ int vmw_validate_single_buffer(struct vmw_private *dev_priv,
+ {
+ struct vmw_dma_buffer *vbo = container_of(bo, struct vmw_dma_buffer,
+ base);
++ struct ttm_operation_ctx ctx = { interruptible, true };
+ int ret;
+
+ if (vbo->pin_count > 0)
+ return 0;
+
+ if (validate_as_mob)
+- return ttm_bo_validate(bo, &vmw_mob_placement, interruptible,
+- false);
++ return ttm_bo_validate(bo, &vmw_mob_placement, &ctx);
+
+ /**
+ * Put BO in VRAM if there is space, otherwise as a GMR.
+@@ -3719,8 +3719,7 @@ int vmw_validate_single_buffer(struct vmw_private *dev_priv,
+ * used as a GMR, this will return -ENOMEM.
+ */
+
+- ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, interruptible,
+- false);
++ ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, &ctx);
+ if (likely(ret == 0 || ret == -ERESTARTSYS))
+ return ret;
+
+@@ -3729,7 +3728,7 @@ int vmw_validate_single_buffer(struct vmw_private *dev_priv,
+ * previous contents.
+ */
+
+- ret = ttm_bo_validate(bo, &vmw_vram_placement, interruptible, false);
++ ret = ttm_bo_validate(bo, &vmw_vram_placement, &ctx);
+ return ret;
+ }
+
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+index a96f90f..200904f 100644
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+@@ -968,6 +968,7 @@ vmw_resource_check_buffer(struct vmw_resource *res,
+ bool interruptible,
+ struct ttm_validate_buffer *val_buf)
+ {
++ struct ttm_operation_ctx ctx = { true, false };
+ struct list_head val_list;
+ bool backup_dirty = false;
+ int ret;
+@@ -992,7 +993,7 @@ vmw_resource_check_buffer(struct vmw_resource *res,
+ backup_dirty = res->backup_dirty;
+ ret = ttm_bo_validate(&res->backup->base,
+ res->func->backup_placement,
+- true, false);
++ &ctx);
+
+ if (unlikely(ret != 0))
+ goto out_no_validate;
+@@ -1446,6 +1447,7 @@ void vmw_resource_evict_all(struct vmw_private *dev_priv)
+ */
+ int vmw_resource_pin(struct vmw_resource *res, bool interruptible)
+ {
++ struct ttm_operation_ctx ctx = { interruptible, false };
+ struct vmw_private *dev_priv = res->dev_priv;
+ int ret;
+
+@@ -1466,7 +1468,7 @@ int vmw_resource_pin(struct vmw_resource *res, bool interruptible)
+ ret = ttm_bo_validate
+ (&vbo->base,
+ res->func->backup_placement,
+- interruptible, false);
++ &ctx);
+ if (ret) {
+ ttm_bo_unreserve(&vbo->base);
+ goto out_no_validate;
+diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
+index 9b832f1..004e18b 100644
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c
+@@ -970,6 +970,7 @@ int vmw_compat_shader_add(struct vmw_private *dev_priv,
+ size_t size,
+ struct list_head *list)
+ {
++ struct ttm_operation_ctx ctx = { false, true };
+ struct vmw_dma_buffer *buf;
+ struct ttm_bo_kmap_obj map;
+ bool is_iomem;
+@@ -1005,7 +1006,7 @@ int vmw_compat_shader_add(struct vmw_private *dev_priv,
+ WARN_ON(is_iomem);
+
+ ttm_bo_kunmap(&map);
+- ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, false, true);
++ ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, &ctx);
+ WARN_ON(ret != 0);
+ ttm_bo_unreserve(&buf->base);
+
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-30 23:32:37 +0000