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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3715-drm-amdgpu-query-vram-type-from-atombios.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3715-drm-amdgpu-query-vram-type-from-atombios.patch190
1 files changed, 190 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3715-drm-amdgpu-query-vram-type-from-atombios.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3715-drm-amdgpu-query-vram-type-from-atombios.patch
new file mode 100644
index 00000000..d244f03e
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3715-drm-amdgpu-query-vram-type-from-atombios.patch
@@ -0,0 +1,190 @@
+From 87a1da2c68932c2afd38bd1e5fe0c0ed68e4a93a Mon Sep 17 00:00:00 2001
+From: Hawking Zhang <Hawking.Zhang@amd.com>
+Date: Thu, 8 Mar 2018 18:01:24 +0800
+Subject: [PATCH 3715/4131] drm/amdgpu: query vram type from atombios
+
+The vram type for dGPU is stored in umc_info while sys mem type
+for APU is stored in integratedsysteminfo
+
+Change-Id: Iec14a0cac407f3da37245786c8f1b688968f8726
+Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 +++++++++++++++++++++++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 +
+ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 +-
+ include/uapi/drm/amdgpu_drm.h | 1 +
+ 4 files changed, 94 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+index ff8efd0..a0f48cb 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+@@ -114,6 +114,9 @@ union igp_info {
+ struct atom_integrated_system_info_v1_11 v11;
+ };
+
++union umc_info {
++ struct atom_umc_info_v3_1 v31;
++};
+ /*
+ * Return vram width from integrated system info table, if available,
+ * or 0 if not.
+@@ -143,6 +146,94 @@ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev)
+ return 0;
+ }
+
++static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev,
++ int atom_mem_type)
++{
++ int vram_type;
++
++ if (adev->flags & AMD_IS_APU) {
++ switch (atom_mem_type) {
++ case Ddr2MemType:
++ case LpDdr2MemType:
++ vram_type = AMDGPU_VRAM_TYPE_DDR2;
++ break;
++ case Ddr3MemType:
++ case LpDdr3MemType:
++ vram_type = AMDGPU_VRAM_TYPE_DDR3;
++ break;
++ case Ddr4MemType:
++ case LpDdr4MemType:
++ vram_type = AMDGPU_VRAM_TYPE_DDR4;
++ break;
++ default:
++ vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
++ break;
++ }
++ } else {
++ switch (atom_mem_type) {
++ case ATOM_DGPU_VRAM_TYPE_GDDR5:
++ vram_type = AMDGPU_VRAM_TYPE_GDDR5;
++ break;
++ case ATOM_DGPU_VRAM_TYPE_HBM:
++ vram_type = AMDGPU_VRAM_TYPE_HBM;
++ break;
++ default:
++ vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
++ break;
++ }
++ }
++
++ return vram_type;
++}
++/*
++ * Return vram type from either integrated system info table
++ * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not
++ */
++int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
++{
++ struct amdgpu_mode_info *mode_info = &adev->mode_info;
++ int index;
++ u16 data_offset, size;
++ union igp_info *igp_info;
++ union umc_info *umc_info;
++ u8 frev, crev;
++ u8 mem_type;
++
++ if (adev->flags & AMD_IS_APU)
++ index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
++ integratedsysteminfo);
++ else
++ index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
++ umc_info);
++ if (amdgpu_atom_parse_data_header(mode_info->atom_context,
++ index, &size,
++ &frev, &crev, &data_offset)) {
++ if (adev->flags & AMD_IS_APU) {
++ igp_info = (union igp_info *)
++ (mode_info->atom_context->bios + data_offset);
++ switch (crev) {
++ case 11:
++ mem_type = igp_info->v11.memorytype;
++ return convert_atom_mem_type_to_vram_type(adev, mem_type);
++ default:
++ return 0;
++ }
++ } else {
++ umc_info = (union umc_info *)
++ (mode_info->atom_context->bios + data_offset);
++ switch (crev) {
++ case 1:
++ mem_type = umc_info->v31.vram_type;
++ return convert_atom_mem_type_to_vram_type(adev, mem_type);
++ default:
++ return 0;
++ }
++ }
++ }
++
++ return 0;
++}
++
+ union firmware_info {
+ struct atom_firmware_info_v3_1 v31;
+ };
+@@ -151,10 +242,6 @@ union smu_info {
+ struct atom_smu_info_v3_1 v31;
+ };
+
+-union umc_info {
+- struct atom_umc_info_v3_1 v31;
+-};
+-
+ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev)
+ {
+ struct amdgpu_mode_info *mode_info = &adev->mode_info;
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
+index 288b97e..7689c96 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
+@@ -28,6 +28,7 @@ bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev)
+ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
+ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
+ int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev);
++int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev);
+ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
+
+ #endif
+diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+index 7f5d37a..b96e58a 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+@@ -836,9 +836,9 @@ static int gmc_v9_0_sw_init(void *handle)
+
+ spin_lock_init(&adev->gmc.invalidate_lock);
+
++ adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev);
+ switch (adev->asic_type) {
+ case CHIP_RAVEN:
+- adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+ if (adev->rev_id == 0x0 || adev->rev_id == 0x1) {
+ amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
+ } else {
+@@ -849,8 +849,6 @@ static int gmc_v9_0_sw_init(void *handle)
+ }
+ break;
+ case CHIP_VEGA10:
+- /* XXX Don't know how to get VRAM type yet. */
+- adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
+ /*
+ * To fulfill 4-level page support,
+ * vm size is 256TB (48bit), maximum size of Vega10,
+diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
+index 28b1a44..d589a8b 100644
+--- a/include/uapi/drm/amdgpu_drm.h
++++ b/include/uapi/drm/amdgpu_drm.h
+@@ -889,6 +889,7 @@ struct drm_amdgpu_info_firmware {
+ #define AMDGPU_VRAM_TYPE_GDDR5 5
+ #define AMDGPU_VRAM_TYPE_HBM 6
+ #define AMDGPU_VRAM_TYPE_DDR3 7
++#define AMDGPU_VRAM_TYPE_DDR4 8
+
+ #define AMDGPU_VRAM_TYPE_HBM_WIDTH 4096
+
+--
+2.7.4
+