diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3669-drm-amd-pp-Refine-powerplay-instance.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3669-drm-amd-pp-Refine-powerplay-instance.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3669-drm-amd-pp-Refine-powerplay-instance.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3669-drm-amd-pp-Refine-powerplay-instance.patch new file mode 100644 index 00000000..f17526ef --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3669-drm-amd-pp-Refine-powerplay-instance.patch @@ -0,0 +1,101 @@ +From b26fd426488084666f4ecdb874c80a4887649835 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 27 Feb 2018 14:09:40 +0800 +Subject: [PATCH 3669/4131] drm/amd/pp: Refine powerplay instance + +Include adev in powerplay instance. +so can visit adev directly instand of through cgs interface. + +Change-Id: Ied35c8beb75b657c026087e0c711fb54f30a2aec +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 ++---- + drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 7 ++++--- + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 + + drivers/gpu/drm/amd/powerplay/inc/pp_instance.h | 8 +++----- + 4 files changed, 10 insertions(+), 12 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 8a5eca9..babcede 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -30,6 +30,7 @@ + #include "pp_instance.h" + #include "power_state.h" + #include "amdgpu.h" ++#include "hwmgr.h" + + #define PP_DPM_DISABLED 0xCCCC + +@@ -64,13 +65,10 @@ static int amd_powerplay_create(struct amdgpu_device *adev) + if (instance == NULL) + return -ENOMEM; + +- instance->chip_family = adev->family; +- instance->chip_id = adev->asic_type; ++ instance->parent = adev; + instance->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false; +- instance->feature_mask = amdgpu_pp_feature_mask; + instance->device = adev->powerplay.cgs_device; + mutex_init(&instance->pp_lock); +- + adev->powerplay.pp_handle = instance; + + return 0; +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +index 33eabc1..7e1bd11 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +@@ -146,10 +146,11 @@ int hwmgr_early_init(struct pp_instance *handle) + return -ENOMEM; + + handle->hwmgr = hwmgr; ++ hwmgr->adev = handle->parent; + hwmgr->device = handle->device; +- hwmgr->chip_family = handle->chip_family; +- hwmgr->chip_id = handle->chip_id; +- hwmgr->feature_mask = handle->feature_mask; ++ hwmgr->chip_family = ((struct amdgpu_device *)handle->parent)->family; ++ hwmgr->chip_id = ((struct amdgpu_device *)handle->parent)->asic_type; ++ hwmgr->feature_mask = amdgpu_pp_feature_mask; + hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT; + hwmgr->power_source = PP_PowerSource_AC; + hwmgr->pp_table_version = PP_TABLE_V1; +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index 77d7f49..bb50cc2 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -700,6 +700,7 @@ enum PP_TABLE_VERSION { + * The main hardware manager structure. + */ + struct pp_hwmgr { ++ void *adev; + uint32_t chip_family; + uint32_t chip_id; + uint32_t smu_version; +diff --git a/drivers/gpu/drm/amd/powerplay/inc/pp_instance.h b/drivers/gpu/drm/amd/powerplay/inc/pp_instance.h +index 7d1eec5..6c2fa33 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/pp_instance.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/pp_instance.h +@@ -23,14 +23,12 @@ + #ifndef _PP_INSTANCE_H_ + #define _PP_INSTANCE_H_ + +-#include "hwmgr.h" ++struct pp_hwmgr; + + struct pp_instance { +- uint32_t chip_family; +- uint32_t chip_id; ++ void *parent; /* e.g. amdgpu_device */ ++ void *device; /* e.g. cgs_device */ + bool pm_en; +- uint32_t feature_mask; +- void *device; + struct pp_hwmgr *hwmgr; + struct mutex pp_lock; + }; +-- +2.7.4 + |