diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3649-drm-amd-display-update-infoframe-after-dig-fe-is-tur.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3649-drm-amd-display-update-infoframe-after-dig-fe-is-tur.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3649-drm-amd-display-update-infoframe-after-dig-fe-is-tur.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3649-drm-amd-display-update-infoframe-after-dig-fe-is-tur.patch new file mode 100644 index 00000000..ab824ad5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3649-drm-amd-display-update-infoframe-after-dig-fe-is-tur.patch @@ -0,0 +1,68 @@ +From 0bd77e833c7c276c48c4134012e9e5a8d12bb6f5 Mon Sep 17 00:00:00 2001 +From: Eric Yang <Eric.Yang2@amd.com> +Date: Wed, 21 Feb 2018 16:37:16 -0500 +Subject: [PATCH 3649/4131] drm/amd/display: update infoframe after dig fe is + turned on + +Before dig fe is enabled, infoframe can't be programmed. So in +suspend resume case our infoframe programmming was not going through. + +This change changes the sequence so that infoframe is programmed +after. + +Signed-off-by: Eric Yang <Eric.Yang2@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + .../amd/display/dc/dce110/dce110_hw_sequencer.c | 23 ++++++++++++---------- + 1 file changed, 13 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index f21aa04..c2041a6 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -684,15 +684,22 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx) + struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; + struct dc_link *link = pipe_ctx->stream->sink->link; + +- /* 1. update AVI info frame (HDMI, DP) +- * we always need to update info frame +- */ ++ + uint32_t active_total_with_borders; + uint32_t early_control = 0; + struct timing_generator *tg = pipe_ctx->stream_res.tg; + +- /* TODOFPGA may change to hwss.update_info_frame */ ++ /* For MST, there are multiply stream go to only one link. ++ * connect DIG back_end to front_end while enable_stream and ++ * disconnect them during disable_stream ++ * BY this, it is logic clean to separate stream and link */ ++ link->link_enc->funcs->connect_dig_be_to_fe(link->link_enc, ++ pipe_ctx->stream_res.stream_enc->id, true); ++ ++ /* update AVI info frame (HDMI, DP)*/ ++ /* TODO: FPGA may change to hwss.update_info_frame */ + dce110_update_info_frame(pipe_ctx); ++ + /* enable early control to avoid corruption on DP monitor*/ + active_total_with_borders = + timing->h_addressable +@@ -713,12 +720,8 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx) + pipe_ctx->stream_res.stream_enc->funcs->dp_audio_enable(pipe_ctx->stream_res.stream_enc); + } + +- /* For MST, there are multiply stream go to only one link. +- * connect DIG back_end to front_end while enable_stream and +- * disconnect them during disable_stream +- * BY this, it is logic clean to separate stream and link */ +- link->link_enc->funcs->connect_dig_be_to_fe(link->link_enc, +- pipe_ctx->stream_res.stream_enc->id, true); ++ ++ + + } + +-- +2.7.4 + |