diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3640-drm-amd-display-Update-DCN-OPTC-registers.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3640-drm-amd-display-Update-DCN-OPTC-registers.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3640-drm-amd-display-Update-DCN-OPTC-registers.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3640-drm-amd-display-Update-DCN-OPTC-registers.patch new file mode 100644 index 00000000..828e14fe --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3640-drm-amd-display-Update-DCN-OPTC-registers.patch @@ -0,0 +1,72 @@ +From 592e2a9f10e93569342515450eb2703c81ae3017 Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Wed, 17 Jan 2018 17:40:16 -0500 +Subject: [PATCH 3640/4131] drm/amd/display: Update DCN OPTC registers + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 +++- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 6 ++++-- + 2 files changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index 4adb2d3..7a1b2de 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -1584,6 +1584,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state) + dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params); + } + ++ + static void update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) + { + struct hubp *hubp = pipe_ctx->plane_res.hubp; +@@ -1819,8 +1820,9 @@ static void program_all_pipe_in_tree( + dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream); + } + +- if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) ++ if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) { + program_all_pipe_in_tree(dc, pipe_ctx->bottom_pipe, context); ++ } + } + + static void dcn10_pplib_apply_display_requirements( +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h +index 0145432..d25e7bf 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h +@@ -83,6 +83,8 @@ + + + struct dcn_optc_registers { ++ uint32_t OTG_GLOBAL_CONTROL1; ++ uint32_t OTG_GLOBAL_CONTROL2; + uint32_t OTG_VERT_SYNC_CONTROL; + uint32_t OTG_MASTER_UPDATE_MODE; + uint32_t OTG_GSL_CONTROL; +@@ -126,6 +128,7 @@ struct dcn_optc_registers { + uint32_t OTG_VERTICAL_INTERRUPT2_POSITION; + uint32_t OPTC_INPUT_CLOCK_CONTROL; + uint32_t OPTC_DATA_SOURCE_SELECT; ++ uint32_t OPTC_MEMORY_CONFIG; + uint32_t OPTC_INPUT_GLOBAL_CONTROL; + uint32_t CONTROL; + uint32_t OTG_GSL_WINDOW_X; +@@ -325,10 +328,9 @@ struct dcn_optc_registers { + type OPTC_INPUT_CLK_EN;\ + type OPTC_INPUT_CLK_ON;\ + type OPTC_INPUT_CLK_GATE_DIS;\ +- type OPTC_SRC_SEL;\ +- type OPTC_SEG0_SRC_SEL;\ + type OPTC_UNDERFLOW_OCCURRED_STATUS;\ + type OPTC_UNDERFLOW_CLEAR;\ ++ type OPTC_SRC_SEL;\ + type VTG0_ENABLE;\ + type VTG0_FP2;\ + type VTG0_VCOUNT_INIT;\ +-- +2.7.4 + |