diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3631-drm-amd-display-update-cur_clock-correctly-within-se.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3631-drm-amd-display-update-cur_clock-correctly-within-se.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3631-drm-amd-display-update-cur_clock-correctly-within-se.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3631-drm-amd-display-update-cur_clock-correctly-within-se.patch new file mode 100644 index 00000000..3636909d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3631-drm-amd-display-update-cur_clock-correctly-within-se.patch @@ -0,0 +1,64 @@ +From 837d2a39019fab86ec21259231dd6062b62b5d49 Mon Sep 17 00:00:00 2001 +From: Yue Hin Lau <Yuehin.Lau@amd.com> +Date: Mon, 12 Feb 2018 17:43:19 -0500 +Subject: [PATCH 3631/4131] drm/amd/display: update cur_clock correctly within + set bandwidth + +Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 12 +++++------- + 1 file changed, 5 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index 29dc37f..0384aef 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -2054,22 +2054,24 @@ static void dcn10_set_bandwidth( + dc->res_pool->display_clock->funcs->set_clock( + dc->res_pool->display_clock, + context->bw.dcn.calc_clk.dispclk_khz); +- dc->current_state->bw.dcn.cur_clk.dispclk_khz = ++ context->bw.dcn.cur_clk.dispclk_khz = + context->bw.dcn.calc_clk.dispclk_khz; + } + if (decrease_allowed || context->bw.dcn.calc_clk.dcfclk_khz + > dc->current_state->bw.dcn.cur_clk.dcfclk_khz) { ++ context->bw.dcn.cur_clk.dcfclk_khz = ++ context->bw.dcn.calc_clk.dcfclk_khz; + smu_req.hard_min_dcefclk_khz = + context->bw.dcn.calc_clk.dcfclk_khz; + } + if (decrease_allowed || context->bw.dcn.calc_clk.fclk_khz + > dc->current_state->bw.dcn.cur_clk.fclk_khz) { ++ context->bw.dcn.cur_clk.fclk_khz = ++ context->bw.dcn.calc_clk.fclk_khz; + smu_req.hard_min_fclk_khz = context->bw.dcn.calc_clk.fclk_khz; + } + if (decrease_allowed || context->bw.dcn.calc_clk.dcfclk_deep_sleep_khz + > dc->current_state->bw.dcn.cur_clk.dcfclk_deep_sleep_khz) { +- dc->current_state->bw.dcn.calc_clk.dcfclk_deep_sleep_khz = +- context->bw.dcn.calc_clk.dcfclk_deep_sleep_khz; + context->bw.dcn.cur_clk.dcfclk_deep_sleep_khz = + context->bw.dcn.calc_clk.dcfclk_deep_sleep_khz; + } +@@ -2084,15 +2086,11 @@ static void dcn10_set_bandwidth( + /* Decrease in freq is increase in period so opposite comparison for dram_ccm */ + if (decrease_allowed || context->bw.dcn.calc_clk.dram_ccm_us + < dc->current_state->bw.dcn.cur_clk.dram_ccm_us) { +- dc->current_state->bw.dcn.calc_clk.dram_ccm_us = +- context->bw.dcn.calc_clk.dram_ccm_us; + context->bw.dcn.cur_clk.dram_ccm_us = + context->bw.dcn.calc_clk.dram_ccm_us; + } + if (decrease_allowed || context->bw.dcn.calc_clk.min_active_dram_ccm_us + < dc->current_state->bw.dcn.cur_clk.min_active_dram_ccm_us) { +- dc->current_state->bw.dcn.calc_clk.min_active_dram_ccm_us = +- context->bw.dcn.calc_clk.min_active_dram_ccm_us; + context->bw.dcn.cur_clk.min_active_dram_ccm_us = + context->bw.dcn.calc_clk.min_active_dram_ccm_us; + } +-- +2.7.4 + |