diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3590-drm-amd-pp-Fix-bug-that-dpm-level-was-not-really-loc.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3590-drm-amd-pp-Fix-bug-that-dpm-level-was-not-really-loc.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3590-drm-amd-pp-Fix-bug-that-dpm-level-was-not-really-loc.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3590-drm-amd-pp-Fix-bug-that-dpm-level-was-not-really-loc.patch new file mode 100644 index 00000000..d61d3892 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3590-drm-amd-pp-Fix-bug-that-dpm-level-was-not-really-loc.patch @@ -0,0 +1,59 @@ +From ec737d5730e0a8cf392a92d6069f15da4b0af68f Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Fri, 9 Feb 2018 16:47:53 +0800 +Subject: [PATCH 3590/4131] drm/amd/pp: Fix bug that dpm level was not really + locked + +Lock the dpm levels when we use SW method to modify +the dpm tables directly to avoid a possible race +with the smu. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 22 ++++++++++++++-------- + 1 file changed, 14 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index 31cf629..9f69be2 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -4642,20 +4642,26 @@ static int smu7_set_power_profile_state(struct pp_hwmgr *hwmgr, + if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_AUTO) + return -EINVAL; + +- tmp_result = smu7_freeze_sclk_mclk_dpm(hwmgr); +- PP_ASSERT_WITH_CODE(!tmp_result, +- "Failed to freeze SCLK MCLK DPM!", +- result = tmp_result); ++ if (smum_is_dpm_running(hwmgr)) { ++ if (!data->sclk_dpm_key_disabled) ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel); ++ ++ if (!data->mclk_dpm_key_disabled) ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel); ++ } + + tmp_result = smum_populate_requested_graphic_levels(hwmgr, request); + PP_ASSERT_WITH_CODE(!tmp_result, + "Failed to populate requested graphic levels!", + result = tmp_result); + +- tmp_result = smu7_unfreeze_sclk_mclk_dpm(hwmgr); +- PP_ASSERT_WITH_CODE(!tmp_result, +- "Failed to unfreeze SCLK MCLK DPM!", +- result = tmp_result); ++ if (smum_is_dpm_running(hwmgr)) { ++ if (!data->sclk_dpm_key_disabled) ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel); ++ ++ if (!data->mclk_dpm_key_disabled) ++ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel); ++ } + + smu7_find_min_clock_masks(hwmgr, &sclk_mask, &mclk_mask, + request->min_sclk, request->min_mclk); +-- +2.7.4 + |