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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3523-drm-amd-display-Remove-extra-pairs-of-parentheses-in.patch127
1 files changed, 127 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3523-drm-amd-display-Remove-extra-pairs-of-parentheses-in.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3523-drm-amd-display-Remove-extra-pairs-of-parentheses-in.patch
new file mode 100644
index 00000000..be0593ad
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3523-drm-amd-display-Remove-extra-pairs-of-parentheses-in.patch
@@ -0,0 +1,127 @@
+From 3632ff141eb7ffb2f9555601411aeedab69cacff Mon Sep 17 00:00:00 2001
+From: Matthias Kaehlcke <mka@chromium.org>
+Date: Wed, 7 Feb 2018 11:49:28 -0800
+Subject: [PATCH 3523/4131] drm/amd/display: Remove extra pairs of parentheses
+ in dce_calcs.c
+
+The double parentheses are not needed. Removing them fixes multiple
+warnings like this when building with clang:
+
+drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:617:42:
+ error: equality comparison with extraneous parentheses
+ [-Werror,-Wparentheses-equality]
+ if ((data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling)) {
+
+Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
+Reviewed-by: Guenter Roeck <groeck@chromium.org>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | 22 +++++++++++-----------
+ 1 file changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
+index f975ecd..4e565da 100644
+--- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
++++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
+@@ -624,7 +624,7 @@ static void calculate_bandwidth(
+ }
+ else {
+ /*graphics portrait tiling mode*/
+- if ((data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling)) {
++ if (data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling) {
+ data->orthogonal_rotation[i] = 0;
+ }
+ else {
+@@ -635,7 +635,7 @@ static void calculate_bandwidth(
+ else {
+ if ((i < 4)) {
+ /*underlay landscape tiling mode is only supported*/
+- if ((data->underlay_micro_tile_mode == bw_def_display_micro_tiling)) {
++ if (data->underlay_micro_tile_mode == bw_def_display_micro_tiling) {
+ data->orthogonal_rotation[i] = 0;
+ }
+ else {
+@@ -644,7 +644,7 @@ static void calculate_bandwidth(
+ }
+ else {
+ /*graphics landscape tiling mode*/
+- if ((data->graphics_micro_tile_mode == bw_def_display_micro_tiling)) {
++ if (data->graphics_micro_tile_mode == bw_def_display_micro_tiling) {
+ data->orthogonal_rotation[i] = 0;
+ }
+ else {
+@@ -948,14 +948,14 @@ static void calculate_bandwidth(
+ }
+ for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
+ if (data->enable[i]) {
+- if ((data->number_of_displays == 1 && data->number_of_underlay_surfaces == 0)) {
++ if (data->number_of_displays == 1 && data->number_of_underlay_surfaces == 0) {
+ /*set maximum chunk limit if only one graphic pipe is enabled*/
+ data->outstanding_chunk_request_limit[i] = bw_int_to_fixed(127);
+ }
+ else {
+ data->outstanding_chunk_request_limit[i] = bw_ceil2(bw_div(data->adjusted_data_buffer_size[i], data->pipe_chunk_size_in_bytes[i]), bw_int_to_fixed(1));
+ /*clamp maximum chunk limit in the graphic display pipe*/
+- if ((i >= 4)) {
++ if (i >= 4) {
+ data->outstanding_chunk_request_limit[i] = bw_max2(bw_int_to_fixed(127), data->outstanding_chunk_request_limit[i]);
+ }
+ }
+@@ -1338,7 +1338,7 @@ static void calculate_bandwidth(
+ /*if stutter and dram clock state change are gated before cursor then the cursor latency hiding does not limit stutter or dram clock state change*/
+ for (i = 0; i <= maximum_number_of_surfaces - 1; i++) {
+ if (data->enable[i]) {
+- if ((dceip->graphics_lb_nodownscaling_multi_line_prefetching == 1)) {
++ if (dceip->graphics_lb_nodownscaling_multi_line_prefetching == 1) {
+ data->maximum_latency_hiding[i] = bw_add(data->minimum_latency_hiding[i], bw_mul(bw_frc_to_fixed(8, 10), data->total_dmifmc_urgent_latency));
+ }
+ else {
+@@ -1397,7 +1397,7 @@ static void calculate_bandwidth(
+ }
+ /*determine the number of displays with margin to switch in the v_active region*/
+ for (k = 0; k <= maximum_number_of_surfaces - 1; k++) {
+- if ((data->enable[k] == 1 && data->display_pstate_change_enable[k] == 1)) {
++ if (data->enable[k] == 1 && data->display_pstate_change_enable[k] == 1) {
+ number_of_displays_enabled_with_margin = number_of_displays_enabled_with_margin + 1;
+ }
+ }
+@@ -1443,7 +1443,7 @@ static void calculate_bandwidth(
+ data->nbp_state_change_enable = bw_def_no;
+ }
+ /*dram clock change is possible only in vblank if all displays are aligned and have no margin*/
+- if ((number_of_aligned_displays_with_no_margin == number_of_displays_enabled)) {
++ if (number_of_aligned_displays_with_no_margin == number_of_displays_enabled) {
+ nbp_state_change_enable_blank = bw_def_yes;
+ }
+ else {
+@@ -1471,7 +1471,7 @@ static void calculate_bandwidth(
+ }
+ }
+ /*compute minimum time to read one chunk from the dmif buffer*/
+- if ((number_of_displays_enabled > 2)) {
++ if (number_of_displays_enabled > 2) {
+ data->chunk_request_delay = 0;
+ }
+ else {
+@@ -1805,7 +1805,7 @@ static void calculate_bandwidth(
+ data->stutter_exit_watermark[i] = bw_add(bw_sub(vbios->stutter_self_refresh_exit_latency, data->total_dmifmc_urgent_latency), data->urgent_watermark[i]);
+ data->stutter_entry_watermark[i] = bw_add(bw_sub(bw_add(vbios->stutter_self_refresh_exit_latency, vbios->stutter_self_refresh_entry_latency), data->total_dmifmc_urgent_latency), data->urgent_watermark[i]);
+ /*unconditionally remove black out time from the nb p_state watermark*/
+- if ((data->display_pstate_change_enable[i] == 1)) {
++ if (data->display_pstate_change_enable[i] == 1) {
+ data->nbp_state_change_watermark[i] = bw_add(bw_add(vbios->nbp_state_change_latency, data->dmif_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y_clk_level][data->sclk_level]));
+ }
+ else {
+@@ -1817,7 +1817,7 @@ static void calculate_bandwidth(
+ data->urgent_watermark[i] = bw_add(bw_add(bw_add(bw_add(bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->line_source_transfer_time[i][data->y_clk_level][data->sclk_level])), vbios->blackout_duration), data->chunk_request_time), data->cursor_request_time);
+ data->stutter_exit_watermark[i] = bw_int_to_fixed(0);
+ data->stutter_entry_watermark[i] = bw_int_to_fixed(0);
+- if ((data->display_pstate_change_enable[i] == 1)) {
++ if (data->display_pstate_change_enable[i] == 1) {
+ data->nbp_state_change_watermark[i] = bw_add(bw_add(vbios->nbp_state_change_latency, data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y_clk_level][data->sclk_level]));
+ }
+ else {
+--
+2.7.4
+