diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3380-drm-amdkfd-Disable-CP-SDMA-ring-doorbell-in-MQD.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3380-drm-amdkfd-Disable-CP-SDMA-ring-doorbell-in-MQD.patch | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3380-drm-amdkfd-Disable-CP-SDMA-ring-doorbell-in-MQD.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3380-drm-amdkfd-Disable-CP-SDMA-ring-doorbell-in-MQD.patch new file mode 100644 index 00000000..aa6fcdb0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3380-drm-amdkfd-Disable-CP-SDMA-ring-doorbell-in-MQD.patch @@ -0,0 +1,112 @@ +From df066bade1c43e2e00dad1ffb8539a4013952df0 Mon Sep 17 00:00:00 2001 +From: Jay Cornwall <Jay.Cornwall@amd.com> +Date: Wed, 1 Nov 2017 19:21:27 -0400 +Subject: [PATCH 3380/4131] drm/amdkfd: Disable CP/SDMA ring/doorbell in MQD + +The MQD represents an inactive context and should not have ring or +doorbell enable bits set. Doing so interferes with HWS which streams +the MQD onto the HQD. If enable bits are set this activates the ring +or doorbell before the HQD is fully configured. + +Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> +Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> +Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> +Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> +--- + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c | 34 +++++++----------------- + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c | 7 ++--- + 2 files changed, 11 insertions(+), 30 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c +index 44ffd23..4859d26 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c +@@ -189,12 +189,9 @@ static int update_mqd(struct mqd_manager *mm, void *mqd, + if (q->format == KFD_QUEUE_FORMAT_AQL) + m->cp_hqd_pq_control |= NO_UPDATE_RPTR; + +- q->is_active = false; +- if (q->queue_size > 0 && ++ q->is_active = (q->queue_size > 0 && + q->queue_address != 0 && +- q->queue_percent > 0) { +- q->is_active = true; +- } ++ q->queue_percent > 0); + + return 0; + } +@@ -215,24 +212,17 @@ static int update_mqd_sdma(struct mqd_manager *mm, void *mqd, + m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); + m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); + m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); +- m->sdma_rlc_doorbell = q->doorbell_off << +- SDMA0_RLC0_DOORBELL__OFFSET__SHIFT | +- 1 << SDMA0_RLC0_DOORBELL__ENABLE__SHIFT; ++ m->sdma_rlc_doorbell = ++ q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT; + + m->sdma_rlc_virtual_addr = q->sdma_vm_addr; + + m->sdma_engine_id = q->sdma_engine_id; + m->sdma_queue_id = q->sdma_queue_id; + +- q->is_active = false; +- if (q->queue_size > 0 && ++ q->is_active = (q->queue_size > 0 && + q->queue_address != 0 && +- q->queue_percent > 0) { +- m->sdma_rlc_rb_cntl |= +- 1 << SDMA0_RLC0_RB_CNTL__RB_ENABLE__SHIFT; +- +- q->is_active = true; +- } ++ q->queue_percent > 0); + + return 0; + } +@@ -359,19 +349,13 @@ static int update_mqd_hiq(struct mqd_manager *mm, void *mqd, + m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); + m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); + m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); +- m->cp_hqd_pq_doorbell_control = DOORBELL_EN | +- DOORBELL_OFFSET(q->doorbell_off); ++ m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off); + + m->cp_hqd_vmid = q->vmid; + +- m->cp_hqd_active = 0; +- q->is_active = false; +- if (q->queue_size > 0 && ++ q->is_active = (q->queue_size > 0 && + q->queue_address != 0 && +- q->queue_percent > 0) { +- m->cp_hqd_active = 1; +- q->is_active = true; +- } ++ q->queue_percent > 0); + + return 0; + } +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c +index 73cbfe1..4ea854f 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c +@@ -163,12 +163,9 @@ static int __update_mqd(struct mqd_manager *mm, void *mqd, + 2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT; + } + +- q->is_active = false; +- if (q->queue_size > 0 && ++ q->is_active = (q->queue_size > 0 && + q->queue_address != 0 && +- q->queue_percent > 0) { +- q->is_active = true; +- } ++ q->queue_percent > 0); + + return 0; + } +-- +2.7.4 + |