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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3327-drm-amdgpu-implement-vce_v4_0_emit_reg_wait-v2.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3327-drm-amdgpu-implement-vce_v4_0_emit_reg_wait-v2.patch71
1 files changed, 71 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3327-drm-amdgpu-implement-vce_v4_0_emit_reg_wait-v2.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3327-drm-amdgpu-implement-vce_v4_0_emit_reg_wait-v2.patch
new file mode 100644
index 00000000..60525f85
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3327-drm-amdgpu-implement-vce_v4_0_emit_reg_wait-v2.patch
@@ -0,0 +1,71 @@
+From c791dde4fa01da12a0490386e06f71e98d8bfa17 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Fri, 26 Jan 2018 14:06:55 +0100
+Subject: [PATCH 3327/4131] drm/amdgpu: implement vce_v4_0_emit_reg_wait v2
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add emit_reg_wait implementation for VCE v4.
+
+v2: call new function directly from existing code
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 22 ++++++++++++++--------
+ 1 file changed, 14 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+index e62a24b..2a4f73d 100755
+--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+@@ -965,6 +965,15 @@ static void vce_v4_0_ring_insert_end(struct amdgpu_ring *ring)
+ amdgpu_ring_write(ring, VCE_CMD_END);
+ }
+
++static void vce_v4_0_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
++ uint32_t val, uint32_t mask)
++{
++ amdgpu_ring_write(ring, VCE_CMD_REG_WAIT);
++ amdgpu_ring_write(ring, reg << 2);
++ amdgpu_ring_write(ring, mask);
++ amdgpu_ring_write(ring, val);
++}
++
+ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
+ unsigned int vmid, unsigned pasid,
+ uint64_t pd_addr)
+@@ -975,16 +984,12 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
+ pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pasid, pd_addr);
+
+ /* wait for reg writes */
+- amdgpu_ring_write(ring, VCE_CMD_REG_WAIT);
+- amdgpu_ring_write(ring, (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2);
+- amdgpu_ring_write(ring, 0xffffffff);
+- amdgpu_ring_write(ring, lower_32_bits(pd_addr));
++ vce_v4_0_emit_reg_wait(ring, hub->ctx0_ptb_addr_lo32 + vmid * 2,
++ lower_32_bits(pd_addr), 0xffffffff);
+
+ /* wait for flush */
+- amdgpu_ring_write(ring, VCE_CMD_REG_WAIT);
+- amdgpu_ring_write(ring, (hub->vm_inv_eng0_ack + eng) << 2);
+- amdgpu_ring_write(ring, 1 << vmid);
+- amdgpu_ring_write(ring, 1 << vmid);
++ vce_v4_0_emit_reg_wait(ring, hub->vm_inv_eng0_ack + eng,
++ 1 << vmid, 1 << vmid);
+ }
+
+ static void vce_v4_0_emit_wreg(struct amdgpu_ring *ring,
+@@ -1079,6 +1084,7 @@ static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = {
+ .begin_use = amdgpu_vce_ring_begin_use,
+ .end_use = amdgpu_vce_ring_end_use,
+ .emit_wreg = vce_v4_0_emit_wreg,
++ .emit_reg_wait = vce_v4_0_emit_reg_wait,
+ };
+
+ static void vce_v4_0_set_ring_funcs(struct amdgpu_device *adev)
+--
+2.7.4
+