diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3324-drm-amdgpu-implement-gfx_v9_0_ring_emit_reg_wait.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3324-drm-amdgpu-implement-gfx_v9_0_ring_emit_reg_wait.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3324-drm-amdgpu-implement-gfx_v9_0_ring_emit_reg_wait.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3324-drm-amdgpu-implement-gfx_v9_0_ring_emit_reg_wait.patch new file mode 100644 index 00000000..097c0848 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3324-drm-amdgpu-implement-gfx_v9_0_ring_emit_reg_wait.patch @@ -0,0 +1,61 @@ +From 441427c23ceeb6a2528552a343912ce8da6562cc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Fri, 26 Jan 2018 13:08:18 +0100 +Subject: [PATCH 3324/4131] drm/amdgpu: implement gfx_v9_0_ring_emit_reg_wait +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Implement emit_reg_wait for gfx v9. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 7fd44fcc..6bd55fb 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4017,6 +4017,12 @@ static void gfx_v9_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, + amdgpu_ring_write(ring, val); + } + ++static void gfx_v9_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, ++ uint32_t val, uint32_t mask) ++{ ++ gfx_v9_0_wait_reg_mem(ring, 0, 0, 0, reg, 0, val, mask, 0x20); ++} ++ + static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, + enum amdgpu_interrupt_state state) + { +@@ -4336,6 +4342,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = { + .patch_cond_exec = gfx_v9_0_ring_emit_patch_cond_exec, + .emit_tmz = gfx_v9_0_ring_emit_tmz, + .emit_wreg = gfx_v9_0_ring_emit_wreg, ++ .emit_reg_wait = gfx_v9_0_ring_emit_reg_wait, + }; + + static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = { +@@ -4368,6 +4375,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = { + .pad_ib = amdgpu_ring_generic_pad_ib, + .set_priority = gfx_v9_0_ring_set_priority_compute, + .emit_wreg = gfx_v9_0_ring_emit_wreg, ++ .emit_reg_wait = gfx_v9_0_ring_emit_reg_wait, + }; + + static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = { +@@ -4395,6 +4403,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = { + .pad_ib = amdgpu_ring_generic_pad_ib, + .emit_rreg = gfx_v9_0_ring_emit_rreg, + .emit_wreg = gfx_v9_0_ring_emit_wreg, ++ .emit_reg_wait = gfx_v9_0_ring_emit_reg_wait, + }; + + static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev) +-- +2.7.4 + |