diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3319-drm-amd-pp-Refine-pp_dpm_force_clock_level-functions.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3319-drm-amd-pp-Refine-pp_dpm_force_clock_level-functions.patch | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3319-drm-amd-pp-Refine-pp_dpm_force_clock_level-functions.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3319-drm-amd-pp-Refine-pp_dpm_force_clock_level-functions.patch new file mode 100644 index 00000000..bdaa3263 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3319-drm-amd-pp-Refine-pp_dpm_force_clock_level-functions.patch @@ -0,0 +1,102 @@ +From 26655c657e6dd8fe8ab4bb6040ccbe382ef31352 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 30 Jan 2018 12:48:12 +0800 +Subject: [PATCH 3319/4131] drm/amd/pp: Refine pp_dpm_force_clock_level + functions + +Only when user set manual performance mode, driver +enable pp_dpm_force_clock_level. +so check the mode in pp_dpm_force_clock_level, +and delete the same logic in callback functions. + +Change-Id: Ib4740723222612f253d3d426f92f20d5e81f561b +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 4 +--- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 5 ++++- + drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 3 --- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 ----- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 5 ----- + 5 files changed, 5 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +index 5ceb5a2..5f61e70 100644 +--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +@@ -6639,9 +6639,7 @@ static int ci_dpm_force_clock_level(void *handle, + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + struct ci_power_info *pi = ci_get_pi(adev); + +- if (adev->pm.dpm.forced_level & (AMD_DPM_FORCED_LEVEL_AUTO | +- AMD_DPM_FORCED_LEVEL_LOW | +- AMD_DPM_FORCED_LEVEL_HIGH)) ++ if (adev->pm.dpm.forced_level != AMD_DPM_FORCED_LEVEL_MANUAL) + return -EINVAL; + + switch (type) { +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 384cfc5..2d3f9c7 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -839,7 +839,10 @@ static int pp_dpm_force_clock_level(void *handle, + return 0; + } + mutex_lock(&pp_handle->pp_lock); +- hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask); ++ if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) ++ ret = hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask); ++ else ++ ret = -EINVAL; + mutex_unlock(&pp_handle->pp_lock); + return ret; + } +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +index 1394b2b..5a7b99f 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +@@ -1558,9 +1558,6 @@ static int cz_get_dal_power_level(struct pp_hwmgr *hwmgr, + static int cz_force_clock_level(struct pp_hwmgr *hwmgr, + enum pp_clock_type type, uint32_t mask) + { +- if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) +- return -EINVAL; +- + switch (type) { + case PP_SCLK: + smum_send_msg_to_smc_with_parameter(hwmgr, +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index f901acc..e446cf0 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -4299,11 +4299,6 @@ static int smu7_force_clock_level(struct pp_hwmgr *hwmgr, + { + struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); + +- if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO | +- AMD_DPM_FORCED_LEVEL_LOW | +- AMD_DPM_FORCED_LEVEL_HIGH)) +- return -EINVAL; +- + switch (type) { + case PP_SCLK: + if (!data->sclk_dpm_key_disabled) +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index 0d88e7f..ec39989 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -4503,11 +4503,6 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr, + { + struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend); + +- if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO | +- AMD_DPM_FORCED_LEVEL_LOW | +- AMD_DPM_FORCED_LEVEL_HIGH)) +- return -EINVAL; +- + switch (type) { + case PP_SCLK: + data->smc_state_table.gfx_boot_level = mask ? (ffs(mask) - 1) : 0; +-- +2.7.4 + |