diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3289-drm-amdgpu-fix-vcn_v1_0_dec_ring_emit_wreg.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3289-drm-amdgpu-fix-vcn_v1_0_dec_ring_emit_wreg.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3289-drm-amdgpu-fix-vcn_v1_0_dec_ring_emit_wreg.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3289-drm-amdgpu-fix-vcn_v1_0_dec_ring_emit_wreg.patch new file mode 100644 index 00000000..0934d6f2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3289-drm-amdgpu-fix-vcn_v1_0_dec_ring_emit_wreg.patch @@ -0,0 +1,63 @@ +From 28e754957b6c0c37cb78589e6e493939e163e67b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Fri, 26 Jan 2018 14:20:55 +0100 +Subject: [PATCH 3289/4131] drm/amdgpu: fix vcn_v1_0_dec_ring_emit_wreg +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +That got mixed up with the encode ring function. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 19 ++++++++++++++++++- + 1 file changed, 18 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +index d8bfeb2..40c0c02 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +@@ -902,6 +902,22 @@ static void vcn_v1_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, + vcn_v1_0_dec_vm_reg_wait(ring, data0, data1, mask); + } + ++static void vcn_v1_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, ++ uint32_t reg, uint32_t val) ++{ ++ struct amdgpu_device *adev = ring->adev; ++ ++ amdgpu_ring_write(ring, ++ PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0)); ++ amdgpu_ring_write(ring, reg << 2); ++ amdgpu_ring_write(ring, ++ PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0)); ++ amdgpu_ring_write(ring, val); ++ amdgpu_ring_write(ring, ++ PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); ++ amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1); ++} ++ + /** + * vcn_v1_0_enc_ring_get_rptr - get enc read pointer + * +@@ -1119,7 +1135,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = { + .pad_ib = amdgpu_ring_generic_pad_ib, + .begin_use = amdgpu_vcn_ring_begin_use, + .end_use = amdgpu_vcn_ring_end_use, +- .emit_wreg = vcn_v1_0_enc_ring_emit_wreg, ++ .emit_wreg = vcn_v1_0_dec_ring_emit_wreg, + }; + + static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = { +@@ -1146,6 +1162,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = { + .pad_ib = amdgpu_ring_generic_pad_ib, + .begin_use = amdgpu_vcn_ring_begin_use, + .end_use = amdgpu_vcn_ring_end_use, ++ .emit_wreg = vcn_v1_0_enc_ring_emit_wreg, + }; + + static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) +-- +2.7.4 + |