diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3265-drm-amd-display-eDP-sequence-BL-off-first-then-DP-bl.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3265-drm-amd-display-eDP-sequence-BL-off-first-then-DP-bl.patch | 153 |
1 files changed, 153 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3265-drm-amd-display-eDP-sequence-BL-off-first-then-DP-bl.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3265-drm-amd-display-eDP-sequence-BL-off-first-then-DP-bl.patch new file mode 100644 index 00000000..a34f8d45 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3265-drm-amd-display-eDP-sequence-BL-off-first-then-DP-bl.patch @@ -0,0 +1,153 @@ +From 4181fe44d9f3308b790d0af7ed72a4dd1a495e7d Mon Sep 17 00:00:00 2001 +From: Charlene Liu <charlene.liu@amd.com> +Date: Thu, 11 Jan 2018 15:31:26 -0500 +Subject: [PATCH 3265/4131] drm/amd/display: eDP sequence BL off first then DP + blank. + +Signed-off-by: Charlene Liu <charlene.liu@amd.com> +Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 7 ++----- + .../gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 3 +++ + .../amd/display/dc/dce110/dce110_hw_sequencer.c | 22 +++++++++++++++++++++- + .../amd/display/dc/dce110/dce110_hw_sequencer.h | 1 + + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 + + drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 1 + + 6 files changed, 29 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +index 0d8211a..b09f77b 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +@@ -1279,13 +1279,12 @@ static enum dc_status enable_link_edp( + enum dc_status status; + struct dc_stream_state *stream = pipe_ctx->stream; + struct dc_link *link = stream->sink->link; +- ++ /*in case it is not on*/ + link->dc->hwss.edp_power_control(link, true); + link->dc->hwss.edp_wait_for_hpd_ready(link, true); + + status = enable_link_dp(state, pipe_ctx); + +- link->dc->hwss.edp_backlight_control(link, true); + + return status; + } +@@ -2309,7 +2308,6 @@ void core_link_enable_stream( + if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) + allocate_mst_payload(pipe_ctx); + +- if (dc_is_dp_signal(pipe_ctx->stream->signal)) + core_dc->hwss.unblank_stream(pipe_ctx, + &pipe_ctx->stream->sink->link->cur_link_settings); + } +@@ -2321,8 +2319,7 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option) + if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) + deallocate_mst_payload(pipe_ctx); + +- if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP) +- core_dc->hwss.edp_backlight_control(pipe_ctx->stream->sink->link, false); ++ core_dc->hwss.blank_stream(pipe_ctx); + + core_dc->hwss.disable_stream(pipe_ctx, option); + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +index 319442f..11f5058 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +@@ -821,6 +821,9 @@ void dce110_link_encoder_hw_init( + cntl.coherent = false; + cntl.hpd_sel = enc110->base.hpd_source; + ++ if (enc110->base.connector.id == CONNECTOR_ID_EDP) ++ cntl.signal = SIGNAL_TYPE_EDP; ++ + result = link_transmitter_control(enc110, &cntl); + + if (result != BP_RESULT_OK) { +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 65a5845..cb20d2c 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -989,12 +989,31 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx, + struct dc_link_settings *link_settings) + { + struct encoder_unblank_param params = { { 0 } }; ++ struct dc_stream_state *stream = pipe_ctx->stream; ++ struct dc_link *link = stream->sink->link; + + /* only 3 items below are used by unblank */ + params.pixel_clk_khz = + pipe_ctx->stream->timing.pix_clk_khz; + params.link_settings.link_rate = link_settings->link_rate; +- pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, ¶ms); ++ ++ if (dc_is_dp_signal(pipe_ctx->stream->signal)) ++ pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, ¶ms); ++ ++ if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP) ++ link->dc->hwss.edp_backlight_control(link, true); ++} ++void dce110_blank_stream(struct pipe_ctx *pipe_ctx) ++{ ++ struct encoder_unblank_param params = { { 0 } }; ++ struct dc_stream_state *stream = pipe_ctx->stream; ++ struct dc_link *link = stream->sink->link; ++ ++ if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP) ++ link->dc->hwss.edp_backlight_control(link, false); ++ ++ if (dc_is_dp_signal(pipe_ctx->stream->signal)) ++ pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc); + } + + +@@ -2911,6 +2930,7 @@ static const struct hw_sequencer_funcs dce110_funcs = { + .enable_stream = dce110_enable_stream, + .disable_stream = dce110_disable_stream, + .unblank_stream = dce110_unblank_stream, ++ .blank_stream = dce110_blank_stream, + .enable_display_pipe_clock_gating = enable_display_pipe_clock_gating, + .enable_display_power_gating = dce110_enable_display_power_gating, + .disable_plane = dce110_power_down_fe, +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h +index 7e1f95a..cdeb54d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h +@@ -52,6 +52,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option); + void dce110_unblank_stream(struct pipe_ctx *pipe_ctx, + struct dc_link_settings *link_settings); + ++void dce110_blank_stream(struct pipe_ctx *pipe_ctx); + void dce110_update_info_frame(struct pipe_ctx *pipe_ctx); + + void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable); +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index e1a8eba..f261c7c 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -2308,6 +2308,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { + .enable_stream = dce110_enable_stream, + .disable_stream = dce110_disable_stream, + .unblank_stream = dce110_unblank_stream, ++ .blank_stream = dce110_blank_stream, + .enable_display_power_gating = dcn10_dummy_display_power_gating, + .disable_plane = dcn10_disable_plane, + .pipe_control_lock = dcn10_pipe_control_lock, +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +index a904b59..5e9a593 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +@@ -149,6 +149,7 @@ struct hw_sequencer_funcs { + void (*unblank_stream)(struct pipe_ctx *pipe_ctx, + struct dc_link_settings *link_settings); + ++ void (*blank_stream)(struct pipe_ctx *pipe_ctx); + void (*pipe_control_lock)( + struct dc *dc, + struct pipe_ctx *pipe, +-- +2.7.4 + |