diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3206-drm-amdgpu-add-PASID-mapping-for-GMC-v7.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3206-drm-amdgpu-add-PASID-mapping-for-GMC-v7.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3206-drm-amdgpu-add-PASID-mapping-for-GMC-v7.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3206-drm-amdgpu-add-PASID-mapping-for-GMC-v7.patch new file mode 100644 index 00000000..31ad254a --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3206-drm-amdgpu-add-PASID-mapping-for-GMC-v7.patch @@ -0,0 +1,46 @@ +From 6319a05548a3174f32b4ad78d06c43fa3c6dd839 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Tue, 16 Jan 2018 20:24:55 +0100 +Subject: [PATCH 3206/4131] drm/amdgpu: add PASID mapping for GMC v7 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This way we can see the PASID in VM faults. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Chunming Zhou <david1.zhou@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/cik.h | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 ++ + 2 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/cik.h b/drivers/gpu/drm/amd/amdgpu/cik.h +index 201d878..e49c6f1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cik.h ++++ b/drivers/gpu/drm/amd/amdgpu/cik.h +@@ -24,7 +24,7 @@ + #ifndef __CIK_H__ + #define __CIK_H__ + +-#define CIK_FLUSH_GPU_TLB_NUM_WREG 2 ++#define CIK_FLUSH_GPU_TLB_NUM_WREG 3 + + void cik_srbm_select(struct amdgpu_device *adev, + u32 me, u32 pipe, u32 queue, u32 vmid); +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +index 64f5457..e1937ce 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +@@ -449,6 +449,8 @@ static uint64_t gmc_v7_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, + reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8; + amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); + ++ amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); ++ + /* bits 0-15 are the VM contexts0-15 */ + amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); + +-- +2.7.4 + |