diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3190-drm-amdgpu-wire-up-emit_wreg-for-gfx-v8.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3190-drm-amdgpu-wire-up-emit_wreg-for-gfx-v8.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3190-drm-amdgpu-wire-up-emit_wreg-for-gfx-v8.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3190-drm-amdgpu-wire-up-emit_wreg-for-gfx-v8.patch new file mode 100644 index 00000000..a620c634 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3190-drm-amdgpu-wire-up-emit_wreg-for-gfx-v8.patch @@ -0,0 +1,65 @@ +From 5eb23dfe8daf7c2339901b96eaa47ffff9009229 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Fri, 12 Jan 2018 16:31:35 +0100 +Subject: [PATCH 3190/4131] drm/amdgpu: wire up emit_wreg for gfx v8 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Needed for vm_flush unification. + +v2: handle compute rings as well + +Signed-off-by: Christian König <christian.koenig@amd.com> +Acked-by: Chunming Zhou <david1.zhou@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index e80d201..c22b921 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -6621,8 +6621,22 @@ static void gfx_v8_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg) + static void gfx_v8_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, + uint32_t val) + { ++ uint32_t cmd; ++ ++ switch (ring->funcs->type) { ++ case AMDGPU_RING_TYPE_GFX: ++ cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; ++ break; ++ case AMDGPU_RING_TYPE_KIQ: ++ cmd = 1 << 16; /* no inc addr */ ++ break; ++ default: ++ cmd = WR_CONFIRM; ++ break; ++ } ++ + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); +- amdgpu_ring_write(ring, (1 << 16)); /* no inc addr */ ++ amdgpu_ring_write(ring, cmd); + amdgpu_ring_write(ring, reg); + amdgpu_ring_write(ring, 0); + amdgpu_ring_write(ring, val); +@@ -6906,6 +6920,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { + .emit_cntxcntl = gfx_v8_ring_emit_cntxcntl, + .init_cond_exec = gfx_v8_0_ring_emit_init_cond_exec, + .patch_cond_exec = gfx_v8_0_ring_emit_patch_cond_exec, ++ .emit_wreg = gfx_v8_0_ring_emit_wreg, + }; + + static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { +@@ -6936,6 +6951,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { + .insert_nop = amdgpu_ring_insert_nop, + .pad_ib = amdgpu_ring_generic_pad_ib, + .set_priority = gfx_v8_0_ring_set_priority_compute, ++ .emit_wreg = gfx_v8_0_ring_emit_wreg, + }; + + static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = { +-- +2.7.4 + |