diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3189-drm-amdgpu-wire-up-emit_wreg-for-gfx-v7.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3189-drm-amdgpu-wire-up-emit_wreg-for-gfx-v7.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3189-drm-amdgpu-wire-up-emit_wreg-for-gfx-v7.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3189-drm-amdgpu-wire-up-emit_wreg-for-gfx-v7.patch new file mode 100644 index 00000000..100c60ac --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3189-drm-amdgpu-wire-up-emit_wreg-for-gfx-v7.patch @@ -0,0 +1,61 @@ +From 72aeab2f607eb4ff13cec7cbcacf0f5920b6f7f5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Fri, 12 Jan 2018 16:31:15 +0100 +Subject: [PATCH 3189/4131] drm/amdgpu: wire up emit_wreg for gfx v7 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Needed for vm_flush unification. + +v2: handle compute rings as well + +Signed-off-by: Christian König <christian.koenig@amd.com> +Acked-by: Chunming Zhou <david1.zhou@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +index 965be87..8e4c624 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +@@ -3290,6 +3290,19 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring, + } + } + ++static void gfx_v7_0_ring_emit_wreg(struct amdgpu_ring *ring, ++ uint32_t reg, uint32_t val) ++{ ++ int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX); ++ ++ amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); ++ amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | ++ WRITE_DATA_DST_SEL(0))); ++ amdgpu_ring_write(ring, reg); ++ amdgpu_ring_write(ring, 0); ++ amdgpu_ring_write(ring, val); ++} ++ + /* + * RLC + * The RLC is a multi-purpose microengine that handles a +@@ -5108,6 +5121,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = { + .insert_nop = amdgpu_ring_insert_nop, + .pad_ib = amdgpu_ring_generic_pad_ib, + .emit_cntxcntl = gfx_v7_ring_emit_cntxcntl, ++ .emit_wreg = gfx_v7_0_ring_emit_wreg, + }; + + static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { +@@ -5137,6 +5151,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { + .test_ib = gfx_v7_0_ring_test_ib, + .insert_nop = amdgpu_ring_insert_nop, + .pad_ib = amdgpu_ring_generic_pad_ib, ++ .emit_wreg = gfx_v7_0_ring_emit_wreg, + }; + + static void gfx_v7_0_set_ring_funcs(struct amdgpu_device *adev) +-- +2.7.4 + |