diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3178-drm-amdkfd-fix-amdgpu_device-renamed-amdgpu_mc-amdgp.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3178-drm-amdkfd-fix-amdgpu_device-renamed-amdgpu_mc-amdgp.patch | 253 |
1 files changed, 253 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3178-drm-amdkfd-fix-amdgpu_device-renamed-amdgpu_mc-amdgp.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3178-drm-amdkfd-fix-amdgpu_device-renamed-amdgpu_mc-amdgp.patch new file mode 100644 index 00000000..a601b623 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3178-drm-amdkfd-fix-amdgpu_device-renamed-amdgpu_mc-amdgp.patch @@ -0,0 +1,253 @@ +From 89c5ad2c298b7dbb9acd35724b3276b33f1b4f43 Mon Sep 17 00:00:00 2001 +From: Kevin Wang <Kevin1.Wang@amd.com> +Date: Thu, 18 Jan 2018 16:07:35 +0800 +Subject: [PATCH 3178/4131] drm/amdkfd: fix amdgpu_device renamed amdgpu_mc -> + amdgpu_gmc compile error + +Change-Id: Ib17658bb082842a12ede73e76ed72b67de8b3555 +Reviewed-by: Le Ma <Le.Ma@amd.com> +Signed-off-by:Kevin Wang <Kevin1.Wang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 14 +++++++------- + drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +- + drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 ++++---- + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 +++--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 14 +++++++------- + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 14 +++++++------- + 8 files changed, 32 insertions(+), 32 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +index e03e9ee..cb8b4ab 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +@@ -496,7 +496,7 @@ static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem, + } + + bo_va_entry->va = va; +- bo_va_entry->pte_flags = amdgpu_vm_get_pte_flags(adev, ++ bo_va_entry->pte_flags = amdgpu_gmc_get_pte_flags(adev, + mem->mapping_flags); + bo_va_entry->kgd_dev = (void *)adev; + list_add(&bo_va_entry->bo_list, list_bo_va); +@@ -1385,8 +1385,8 @@ static u64 get_vm_pd_gpu_offset(void *vm) + /* On some ASICs the FB doesn't start at 0. Adjust FB offset + * to an actual MC address. + */ +- if (adev->gart.gart_funcs->get_vm_pde) +- amdgpu_gart_get_vm_pde(adev, -1, &offset, &flags); ++ if (adev->gmc.gmc_funcs->get_vm_pde) ++ amdgpu_gmc_get_vm_pde(adev, -1, &offset, &flags); + + return offset; + } +@@ -1522,10 +1522,10 @@ int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd, + struct amdgpu_device *adev; + + adev = (struct amdgpu_device *) kgd; +- if (atomic_read(&adev->mc.vm_fault_info_updated) == 1) { +- *mem = *adev->mc.vm_fault_info; ++ if (atomic_read(&adev->gmc.vm_fault_info_updated) == 1) { ++ *mem = *adev->gmc.vm_fault_info; + mb(); +- atomic_set(&adev->mc.vm_fault_info_updated, 0); ++ atomic_set(&adev->gmc.vm_fault_info_updated, 0); + } + return 0; + } +@@ -1754,7 +1754,7 @@ static int get_sg_table(struct amdgpu_device *adev, + goto out; + + if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM) { +- bus_addr = bo->tbo.offset + adev->mc.aper_base + offset; ++ bus_addr = bo->tbo.offset + adev->gmc.aper_base + offset; + + for_each_sg(sg->sgl, s, sg->orig_nents, i) { + uint64_t chunk_size, length; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c +index 34cb5c1..0065768 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c +@@ -255,7 +255,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper, + + /* setup aperture base/size for vesafb takeover */ + info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; +- info->apertures->ranges[0].size = adev->gmc.aper_size; ++ info->aperture_size = adev->gmc.aper_size; + + /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +index 2378a2e..0faa617 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +@@ -519,8 +519,8 @@ int amdgpu_gem_dgma_ioctl(struct drm_device *dev, void *data, + goto release_object; + } + args->addr = amdgpu_bo_gpu_offset(abo); +- args->addr -= adev->mc.vram_start; +- args->addr += adev->mc.aper_base; ++ args->addr -= adev->gmc.vram_start; ++ args->addr += adev->gmc.aper_base; + break; + default: + return -EINVAL; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +index 500b417..65d69a9 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +@@ -303,12 +303,12 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file + struct drm_amdgpu_virtual_range range_info; + switch (info->virtual_range.aperture) { + case AMDGPU_SUA_APERTURE_PRIVATE: +- range_info.start = adev->mc.private_aperture_start; +- range_info.end = adev->mc.private_aperture_end; ++ range_info.start = adev->gmc.private_aperture_start; ++ range_info.end = adev->gmc.private_aperture_end; + break; + case AMDGPU_SUA_APERTURE_SHARED: +- range_info.start = adev->mc.shared_aperture_start; +- range_info.end = adev->mc.shared_aperture_end; ++ range_info.start = adev->gmc.shared_aperture_start; ++ range_info.end = adev->gmc.shared_aperture_end; + break; + default: + return -EINVAL; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +index 64d0141..9f7e6c5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +@@ -695,7 +695,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ + case TTM_PL_VRAM: + case AMDGPU_PL_DGMA: + mem->bus.offset = (mem->start << PAGE_SHIFT) + man->gpu_offset - +- adev->mc.vram_start; ++ adev->gmc.vram_start; + /* check if it's visible */ + if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size) + return -EINVAL; +@@ -1464,9 +1464,9 @@ static int amdgpu_ssg_init(struct amdgpu_device *adev) + + init_completion(&adev->ssg.cmp); + +- res.start = adev->mc.aper_base + ++ res.start = adev->gmc.aper_base + + (amdgpu_bo_gpu_offset(adev->direct_gma.dgma_bo) - +- adev->mc.vram_start); ++ adev->gmc.vram_start); + res.end = res.start + amdgpu_bo_size(adev->direct_gma.dgma_bo) - 1; + res.name = "DirectGMA"; + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 719964f..5cca5af 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1438,7 +1438,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, + if (mem && mem->mem_type == TTM_PL_VRAM && + adev != bo_adev) { + flags |= AMDGPU_PTE_SYSTEM; +- vram_base_offset = bo_adev->mc.aper_base; ++ vram_base_offset = bo_adev->gmc.aper_base; + } + } else + flags = 0x0; +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +index 7874326..20ceb9d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +@@ -1037,11 +1037,11 @@ static int gmc_v7_0_sw_init(void *handle) + adev->vm_manager.vram_base_offset = 0; + } + +- adev->mc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), ++ adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), + GFP_KERNEL); +- if (!adev->mc.vm_fault_info) ++ if (!adev->gmc.vm_fault_info) + return -ENOMEM; +- atomic_set(&adev->mc.vm_fault_info_updated, 0); ++ atomic_set(&adev->gmc.vm_fault_info_updated, 0); + + return 0; + } +@@ -1050,7 +1050,7 @@ static int gmc_v7_0_sw_fini(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- kfree(adev->mc.vm_fault_info); ++ kfree(adev->gmc.vm_fault_info); + amdgpu_gem_force_release(adev); + amdgpu_vm_manager_fini(adev); + gmc_v7_0_gart_fini(adev); +@@ -1270,8 +1270,8 @@ static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev, + vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, + VMID); + if (amdgpu_amdkfd_is_kfd_vmid(adev, vmid) +- && !atomic_read(&adev->mc.vm_fault_info_updated)) { +- struct kfd_vm_fault_info *info = adev->mc.vm_fault_info; ++ && !atomic_read(&adev->gmc.vm_fault_info_updated)) { ++ struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info; + u32 protections = REG_GET_FIELD(status, + VM_CONTEXT1_PROTECTION_FAULT_STATUS, + PROTECTIONS); +@@ -1287,7 +1287,7 @@ static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev, + info->prot_write = protections & 0x10 ? true : false; + info->prot_exec = protections & 0x20 ? true : false; + mb(); +- atomic_set(&adev->mc.vm_fault_info_updated, 1); ++ atomic_set(&adev->gmc.vm_fault_info_updated, 1); + } + + return 0; +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +index 623d5f9..67b1dd2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +@@ -1139,11 +1139,11 @@ static int gmc_v8_0_sw_init(void *handle) + adev->vm_manager.vram_base_offset = 0; + } + +- adev->mc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), ++ adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), + GFP_KERNEL); +- if (!adev->mc.vm_fault_info) ++ if (!adev->gmc.vm_fault_info) + return -ENOMEM; +- atomic_set(&adev->mc.vm_fault_info_updated, 0); ++ atomic_set(&adev->gmc.vm_fault_info_updated, 0); + + return 0; + } +@@ -1152,7 +1152,7 @@ static int gmc_v8_0_sw_fini(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- kfree(adev->mc.vm_fault_info); ++ kfree(adev->gmc.vm_fault_info); + amdgpu_gem_force_release(adev); + amdgpu_vm_manager_fini(adev); + gmc_v8_0_gart_fini(adev); +@@ -1425,8 +1425,8 @@ static int gmc_v8_0_process_interrupt(struct amdgpu_device *adev, + vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, + VMID); + if (amdgpu_amdkfd_is_kfd_vmid(adev, vmid) +- && !atomic_read(&adev->mc.vm_fault_info_updated)) { +- struct kfd_vm_fault_info *info = adev->mc.vm_fault_info; ++ && !atomic_read(&adev->gmc.vm_fault_info_updated)) { ++ struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info; + u32 protections = REG_GET_FIELD(status, + VM_CONTEXT1_PROTECTION_FAULT_STATUS, + PROTECTIONS); +@@ -1442,7 +1442,7 @@ static int gmc_v8_0_process_interrupt(struct amdgpu_device *adev, + info->prot_write = protections & 0x10 ? true : false; + info->prot_exec = protections & 0x20 ? true : false; + mb(); +- atomic_set(&adev->mc.vm_fault_info_updated, 1); ++ atomic_set(&adev->gmc.vm_fault_info_updated, 1); + } + + return 0; +-- +2.7.4 + |