diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3170-drm-amd-pp-Add-stable-Pstate-clk-display-support-in-.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3170-drm-amd-pp-Add-stable-Pstate-clk-display-support-in-.patch | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3170-drm-amd-pp-Add-stable-Pstate-clk-display-support-in-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3170-drm-amd-pp-Add-stable-Pstate-clk-display-support-in-.patch new file mode 100644 index 00000000..b3b3b2cd --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3170-drm-amd-pp-Add-stable-Pstate-clk-display-support-in-.patch @@ -0,0 +1,93 @@ +From c6311b12307ff05f636636f67b0ca0429817fbe7 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Mon, 8 Jan 2018 13:59:05 +0800 +Subject: [PATCH 3170/4131] drm/amd/pp: Add stable Pstate clk display support + in debugfs + +The additional output are: PSTATE_SCLK and PSTATE_MCLK value +in MHz as: + +300 MHz (PSTATE_SCLK) +300 MHz (PSTATE_MCLK) + +Change-Id: Id38e214153d54943edc8f4c56d110ecdb470ae55 +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 4 ++++ + drivers/gpu/drm/amd/include/kgd_pp_interface.h | 2 ++ + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 23 ++++++++++++++--------- + 3 files changed, 20 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +index 45e9119..6b70160 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +@@ -1588,6 +1588,10 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a + seq_printf(m, "\t%u MHz (MCLK)\n", value/100); + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value, &size)) + seq_printf(m, "\t%u MHz (SCLK)\n", value/100); ++ if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, (void *)&value, &size)) ++ seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100); ++ if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, (void *)&value, &size)) ++ seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100); + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value, &size)) + seq_printf(m, "\t%u mV (VDDGFX)\n", value); + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value, &size)) +diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h +index 1746180..68f2c84 100644 +--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h ++++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h +@@ -122,6 +122,8 @@ enum amd_pp_sensors { + AMDGPU_PP_SENSOR_VCE_POWER, + AMDGPU_PP_SENSOR_UVD_POWER, + AMDGPU_PP_SENSOR_GPU_POWER, ++ AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, ++ AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, + }; + + enum amd_pp_task { +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index 4131180..be7bd86 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -992,22 +992,27 @@ static int pp_dpm_read_sensor(void *handle, int idx, + int ret = 0; + + ret = pp_check(pp_handle); +- + if (ret) + return ret; + ++ if (value == NULL) ++ return -EINVAL; ++ + hwmgr = pp_handle->hwmgr; + +- if (hwmgr->hwmgr_func->read_sensor == NULL) { +- pr_info("%s was not implemented.\n", __func__); ++ switch (idx) { ++ case AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK: ++ *((uint32_t *)value) = hwmgr->pstate_sclk; + return 0; ++ case AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK: ++ *((uint32_t *)value) = hwmgr->pstate_mclk; ++ return 0; ++ default: ++ mutex_lock(&pp_handle->pp_lock); ++ ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size); ++ mutex_unlock(&pp_handle->pp_lock); ++ return ret; + } +- +- mutex_lock(&pp_handle->pp_lock); +- ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size); +- mutex_unlock(&pp_handle->pp_lock); +- +- return ret; + } + + static struct amd_vce_state* +-- +2.7.4 + |