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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3164-drm-amd-pp-Add-querying-current-gfx-voltage-for-Vega.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3164-drm-amd-pp-Add-querying-current-gfx-voltage-for-Vega.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3164-drm-amd-pp-Add-querying-current-gfx-voltage-for-Vega.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3164-drm-amd-pp-Add-querying-current-gfx-voltage-for-Vega.patch
new file mode 100644
index 00000000..bdd31975
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3164-drm-amd-pp-Add-querying-current-gfx-voltage-for-Vega.patch
@@ -0,0 +1,69 @@
+From 85a0a2d3358ade2efbee2187d273cab6d5222efb Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Tue, 2 Jan 2018 14:10:45 +0800
+Subject: [PATCH 3164/4131] drm/amd/pp: Add querying current gfx voltage for
+ Vega10
+
+Change-Id: I7be7cb442c620f850044d58bd8097735e3398b07
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 13 +++++++++++++
+ drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h | 3 ++-
+ 2 files changed, 15 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+index 4954e06..d1671e2 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+@@ -51,6 +51,9 @@
+ #include "pp_overdriver.h"
+ #include "pp_thermal.h"
+
++#include "smuio/smuio_9_0_offset.h"
++#include "smuio/smuio_9_0_sh_mask.h"
++
+ #define VOLTAGE_SCALE 4
+ #define VOLTAGE_VID_OFFSET_SCALE1 625
+ #define VOLTAGE_VID_OFFSET_SCALE2 100
+@@ -3903,6 +3906,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
+ struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
+ struct vega10_dpm_table *dpm_table = &data->dpm_table;
+ int ret = 0;
++ uint32_t reg, val_vid;
+
+ switch (idx) {
+ case AMDGPU_PP_SENSOR_GFX_SCLK:
+@@ -3949,6 +3953,15 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
+ ret = vega10_get_gpu_power(hwmgr, (struct pp_gpu_power *)value);
+ }
+ break;
++ case AMDGPU_PP_SENSOR_VDDGFX:
++ reg = soc15_get_register_offset(SMUIO_HWID, 0,
++ mmSMUSVI0_PLANE0_CURRENTVID_BASE_IDX,
++ mmSMUSVI0_PLANE0_CURRENTVID);
++ val_vid = (cgs_read_register(hwmgr->device, reg) &
++ SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID_MASK) >>
++ SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT;
++ *((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid);
++ return 0;
+ default:
+ ret = -EINVAL;
+ break;
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h b/drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h
+index b7ab69e..414e684 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/pp_soc15.h
+@@ -43,7 +43,8 @@ inline static uint32_t soc15_get_register_offset(
+ reg = DF_BASE.instance[inst].segment[segment] + offset;
+ else if (hw_id == GC_HWID)
+ reg = GC_BASE.instance[inst].segment[segment] + offset;
+-
++ else if (hw_id == SMUIO_HWID)
++ reg = SMUIO_BASE.instance[inst].segment[segment] + offset;
+ return reg;
+ }
+
+--
+2.7.4
+