diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3163-drm-amd-pp-Add-querying-current-gfx-voltage-for-CI-V.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3163-drm-amd-pp-Add-querying-current-gfx-voltage-for-CI-V.patch | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3163-drm-amd-pp-Add-querying-current-gfx-voltage-for-CI-V.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3163-drm-amd-pp-Add-querying-current-gfx-voltage-for-CI-V.patch new file mode 100644 index 00000000..4a84b29e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3163-drm-amd-pp-Add-querying-current-gfx-voltage-for-CI-V.patch @@ -0,0 +1,112 @@ +From b90b0bef8d416f85344ec61586c315e5919363f1 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 3 Jan 2018 17:21:28 +0800 +Subject: [PATCH 3163/4131] drm/amd/pp: Add querying current gfx voltage for + CI/VI + +Store the voltage regulator configuration, +so we can properly query the voltage. + +Change-Id: Icec3a93f26b532e466a36d0ebac5886d43df8e6d +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 12 +++++++++++- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | 1 + + drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 2 +- + drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 2 +- + drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 3 +-- + 5 files changed, 15 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index e1c16d5..284c21f 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -3320,7 +3320,7 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, + void *value, int *size) + { + uint32_t sclk, mclk, activity_percent; +- uint32_t offset; ++ uint32_t offset, val_vid; + struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); + + /* size must be at least 4 bytes for all sensors */ +@@ -3368,6 +3368,16 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, + return -EINVAL; + *size = sizeof(struct pp_gpu_power); + return smu7_get_gpu_power(hwmgr, (struct pp_gpu_power *)value); ++ case AMDGPU_PP_SENSOR_VDDGFX: ++ if ((data->vr_config & 0xff) == 0x2) ++ val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device, ++ CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID); ++ else ++ val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device, ++ CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE1_VID); ++ ++ *((uint32_t *)value) = (uint32_t)convert_to_vddc(val_vid); ++ return 0; + default: + return -EINVAL; + } +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h +index e021154..beba25c 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h +@@ -305,6 +305,7 @@ struct smu7_hwmgr { + uint32_t frame_time_x2; + uint16_t mem_latency_high; + uint16_t mem_latency_low; ++ uint32_t vr_config; + }; + + /* To convert to Q8.8 format for firmware */ +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +index 427daa6..7d9e2cb 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +@@ -2141,7 +2141,7 @@ static int fiji_init_smc_table(struct pp_hwmgr *hwmgr) + result = fiji_populate_vr_config(hwmgr, table); + PP_ASSERT_WITH_CODE(0 == result, + "Failed to populate VRConfig setting!", return result); +- ++ data->vr_config = table->VRConfig; + table->ThermGpio = 17; + table->SclkStepSize = 0x4000; + +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c +index fd874f7..f1a3bc8 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c +@@ -1991,7 +1991,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr) + result = polaris10_populate_vr_config(hwmgr, table); + PP_ASSERT_WITH_CODE(0 == result, + "Failed to populate VRConfig setting!", return result); +- ++ hw_data->vr_config = table->VRConfig; + table->ThermGpio = 17; + table->SclkStepSize = 0x4000; + +diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +index 5eb719e..a03a345 100644 +--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c ++++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +@@ -2434,7 +2434,7 @@ static int tonga_init_smc_table(struct pp_hwmgr *hwmgr) + result = tonga_populate_vr_config(hwmgr, table); + PP_ASSERT_WITH_CODE(!result, + "Failed to populate VRConfig setting !", return result); +- ++ data->vr_config = table->VRConfig; + table->ThermGpio = 17; + table->SclkStepSize = 0x4000; + +@@ -2501,7 +2501,6 @@ static int tonga_init_smc_table(struct pp_hwmgr *hwmgr) + + for (i = 0; i < SMU72_MAX_ENTRIES_SMIO; i++) + table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]); +- + CONVERT_FROM_HOST_TO_SMC_UL(table->SystemFlags); + CONVERT_FROM_HOST_TO_SMC_UL(table->VRConfig); + CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMask1); +-- +2.7.4 + |