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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3098-drm-amd-display-Fix-FBC-topology-change.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3098-drm-amd-display-Fix-FBC-topology-change.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3098-drm-amd-display-Fix-FBC-topology-change.patch
new file mode 100644
index 00000000..6e8ce90f
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3098-drm-amd-display-Fix-FBC-topology-change.patch
@@ -0,0 +1,69 @@
+From 17472826c2fa73c1b553b86bbc46b05bb90fc10c Mon Sep 17 00:00:00 2001
+From: Roman Li <Roman.Li@amd.com>
+Date: Fri, 15 Dec 2017 17:18:19 -0500
+Subject: [PATCH 3098/4131] drm/amd/display: Fix FBC topology change
+
+With FBC enabled there was a potential null-deref
+on topology change due to hardcorded pipe index.
+
+Signed-off-by: Roman Li <Roman.Li@amd.com>
+Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
+---
+ .../amd/display/dc/dce110/dce110_hw_sequencer.c | 23 ++++++++++++++++++----
+ 1 file changed, 19 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+index 2ecb348..1a28938 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+@@ -1690,9 +1690,13 @@ static void apply_min_clocks(
+ * Check if FBC can be enabled
+ */
+ static bool should_enable_fbc(struct dc *dc,
+- struct dc_state *context)
++ struct dc_state *context,
++ uint32_t *pipe_idx)
+ {
+- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[0];
++ uint32_t i;
++ struct pipe_ctx *pipe_ctx = NULL;
++ struct resource_context *res_ctx = &context->res_ctx;
++
+
+ ASSERT(dc->fbc_compressor);
+
+@@ -1704,6 +1708,14 @@ static bool should_enable_fbc(struct dc *dc,
+ if (context->stream_count != 1)
+ return false;
+
++ for (i = 0; i < dc->res_pool->pipe_count; i++) {
++ if (res_ctx->pipe_ctx[i].stream) {
++ pipe_ctx = &res_ctx->pipe_ctx[i];
++ *pipe_idx = i;
++ break;
++ }
++ }
++
+ /* Only supports eDP */
+ if (pipe_ctx->stream->sink->link->connector_signal != SIGNAL_TYPE_EDP)
+ return false;
+@@ -1729,11 +1741,14 @@ static bool should_enable_fbc(struct dc *dc,
+ static void enable_fbc(struct dc *dc,
+ struct dc_state *context)
+ {
+- if (should_enable_fbc(dc, context)) {
++ uint32_t pipe_idx = 0;
++
++ if (should_enable_fbc(dc, context, &pipe_idx)) {
+ /* Program GRPH COMPRESSED ADDRESS and PITCH */
+ struct compr_addr_and_pitch_params params = {0, 0, 0};
+ struct compressor *compr = dc->fbc_compressor;
+- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[0];
++ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx];
++
+
+ params.source_view_width = pipe_ctx->stream->timing.h_addressable;
+ params.source_view_height = pipe_ctx->stream->timing.v_addressable;
+--
+2.7.4
+