diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3072-drm-amd-powerplay-use-ffs-fls-instead-of-implementin.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3072-drm-amd-powerplay-use-ffs-fls-instead-of-implementin.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3072-drm-amd-powerplay-use-ffs-fls-instead-of-implementin.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3072-drm-amd-powerplay-use-ffs-fls-instead-of-implementin.patch new file mode 100644 index 00000000..09ccd7e8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3072-drm-amd-powerplay-use-ffs-fls-instead-of-implementin.patch @@ -0,0 +1,68 @@ +From 8e6e37ec91bd405904a54bbf7c2b359d5c161ab6 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Wed, 3 Jan 2018 10:28:10 +0800 +Subject: [PATCH 3072/4131] drm/amd/powerplay: use ffs/fls instead of + implementing our own + +Change-Id: I2683296f7b08cc637ed54b0b4b7db03b8818e658 +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 27 ++++------------------ + 1 file changed, 4 insertions(+), 23 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index da82e1e..f97d856 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -4492,7 +4492,6 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr, + enum pp_clock_type type, uint32_t mask) + { + struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend); +- int i; + + if (hwmgr->request_dpm_level & (AMD_DPM_FORCED_LEVEL_AUTO | + AMD_DPM_FORCED_LEVEL_LOW | +@@ -4501,17 +4500,8 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr, + + switch (type) { + case PP_SCLK: +- for (i = 0; i < 32; i++) { +- if (mask & (1 << i)) +- break; +- } +- data->smc_state_table.gfx_boot_level = i; +- +- for (i = 31; i >= 0; i--) { +- if (mask & (1 << i)) +- break; +- } +- data->smc_state_table.gfx_max_level = i; ++ data->smc_state_table.gfx_boot_level = mask ? (ffs(mask) - 1) : 0; ++ data->smc_state_table.gfx_max_level = mask ? (fls(mask) - 1) : 0; + + PP_ASSERT_WITH_CODE(!vega10_upload_dpm_bootup_level(hwmgr), + "Failed to upload boot level to lowest!", +@@ -4523,17 +4513,8 @@ static int vega10_force_clock_level(struct pp_hwmgr *hwmgr, + break; + + case PP_MCLK: +- for (i = 0; i < 32; i++) { +- if (mask & (1 << i)) +- break; +- } +- data->smc_state_table.mem_boot_level = i; +- +- for (i = 31; i >= 0; i--) { +- if (mask & (1 << i)) +- break; +- } +- data->smc_state_table.mem_max_level = i; ++ data->smc_state_table.mem_boot_level = mask ? (ffs(mask) - 1) : 0; ++ data->smc_state_table.mem_max_level = mask ? (fls(mask) - 1) : 0; + + PP_ASSERT_WITH_CODE(!vega10_upload_dpm_bootup_level(hwmgr), + "Failed to upload boot level to lowest!", +-- +2.7.4 + |