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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3059-drm-amd-powerplay-removed-hwmgr_handle_task-unused-p.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3059-drm-amd-powerplay-removed-hwmgr_handle_task-unused-p.patch202
1 files changed, 202 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3059-drm-amd-powerplay-removed-hwmgr_handle_task-unused-p.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3059-drm-amd-powerplay-removed-hwmgr_handle_task-unused-p.patch
new file mode 100644
index 00000000..67e68875
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/3059-drm-amd-powerplay-removed-hwmgr_handle_task-unused-p.patch
@@ -0,0 +1,202 @@
+From ecf764a9ff7a25482a5f1fe3cfa842c4320a3f82 Mon Sep 17 00:00:00 2001
+From: Evan Quan <evan.quan@amd.com>
+Date: Fri, 29 Dec 2017 14:46:13 +0800
+Subject: [PATCH 3059/4131] drm/amd/powerplay: removed hwmgr_handle_task unused
+ parameter and given a better name for other parameter
+
+Change-Id: Iea827bdd8346da1286da8928044fb564c22ca63b
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 4 ++--
+ drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 10 +++++-----
+ drivers/gpu/drm/amd/include/kgd_pp_interface.h | 2 +-
+ drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 12 ++++++------
+ drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 8 +++-----
+ drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 +-
+ 6 files changed, 18 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+index f21a140..0a5febd 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+@@ -328,8 +328,8 @@ enum amdgpu_pcie_gen {
+ #define amdgpu_dpm_set_mclk_od(adev, value) \
+ ((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))
+
+-#define amdgpu_dpm_dispatch_task(adev, task_id, input, output) \
+- ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))
++#define amdgpu_dpm_dispatch_task(adev, task_id, user_state) \
++ ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (user_state))
+
+ #define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \
+ ((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+index d460000..11f100e 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+@@ -114,7 +114,7 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev,
+ }
+
+ if (adev->powerplay.pp_funcs->dispatch_tasks) {
+- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);
++ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state);
+ } else {
+ mutex_lock(&adev->pm.mutex);
+ adev->pm.dpm.user_state = state;
+@@ -314,7 +314,7 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,
+ if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&
+ state != POWER_STATE_TYPE_DEFAULT) {
+ amdgpu_dpm_dispatch_task(adev,
+- AMD_PP_TASK_ENABLE_USER_STATE, &state, NULL);
++ AMD_PP_TASK_ENABLE_USER_STATE, &state);
+ adev->pp_force_state_enabled = true;
+ }
+ }
+@@ -528,7 +528,7 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
+ amdgpu_dpm_set_sclk_od(adev, (uint32_t)value);
+
+ if (adev->powerplay.pp_funcs->dispatch_tasks) {
+- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
++ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
+ } else {
+ adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
+ amdgpu_pm_compute_clocks(adev);
+@@ -572,7 +572,7 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
+ amdgpu_dpm_set_mclk_od(adev, (uint32_t)value);
+
+ if (adev->powerplay.pp_funcs->dispatch_tasks) {
+- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
++ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
+ } else {
+ adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
+ amdgpu_pm_compute_clocks(adev);
+@@ -1459,7 +1459,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
+ }
+
+ if (adev->powerplay.pp_funcs->dispatch_tasks) {
+- amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL, NULL);
++ amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL);
+ } else {
+ mutex_lock(&adev->pm.mutex);
+ adev->pm.dpm.new_active_crtcs = 0;
+diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+index ed27626..0f89d2a8 100644
+--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
++++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+@@ -256,7 +256,7 @@ struct amd_pm_funcs {
+ void (*powergate_vce)(void *handle, bool gate);
+ struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
+ int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
+- void *input, void *output);
++ enum amd_pm_state_type *user_state);
+ int (*load_firmware)(void *handle);
+ int (*wait_for_fw_loading_complete)(void *handle);
+ int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
+diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+index 85c2179..9f555d0 100644
+--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+@@ -33,7 +33,7 @@
+ #define PP_DPM_DISABLED 0xCCCC
+
+ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
+- void *input, void *output);
++ enum amd_pm_state_type *user_state);
+
+ static inline int pp_check(struct pp_instance *handle)
+ {
+@@ -198,7 +198,7 @@ static int pp_late_init(void *handle)
+ ret = pp_check(pp_handle);
+ if (ret == 0)
+ pp_dpm_dispatch_tasks(pp_handle,
+- AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
++ AMD_PP_TASK_COMPLETE_INIT, NULL);
+
+ return 0;
+ }
+@@ -392,7 +392,7 @@ static int pp_dpm_force_performance_level(void *handle,
+ mutex_lock(&pp_handle->pp_lock);
+ pp_dpm_en_umd_pstate(hwmgr, &level);
+ hwmgr->request_dpm_level = level;
+- hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL);
++ hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
+ mutex_unlock(&pp_handle->pp_lock);
+
+ return 0;
+@@ -511,7 +511,7 @@ static void pp_dpm_powergate_uvd(void *handle, bool gate)
+ }
+
+ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
+- void *input, void *output)
++ enum amd_pm_state_type *user_state)
+ {
+ int ret = 0;
+ struct pp_instance *pp_handle = (struct pp_instance *)handle;
+@@ -522,7 +522,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
+ return ret;
+
+ mutex_lock(&pp_handle->pp_lock);
+- ret = hwmgr_handle_task(pp_handle, task_id, input, output);
++ ret = hwmgr_handle_task(pp_handle, task_id, user_state);
+ mutex_unlock(&pp_handle->pp_lock);
+
+ return ret;
+@@ -797,7 +797,7 @@ static int amd_powerplay_reset(void *handle)
+ if (ret)
+ return ret;
+
+- return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
++ return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL);
+ }
+
+ static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+index ec3cdf5..654cb11 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+@@ -369,7 +369,7 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state)
+ }
+
+ int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,
+- void *input, void *output)
++ enum amd_pm_state_type *user_state)
+ {
+ int ret = 0;
+ struct pp_hwmgr *hwmgr;
+@@ -391,17 +391,15 @@ int hwmgr_handle_task(struct pp_instance *handle, enum amd_pp_task task_id,
+ break;
+ case AMD_PP_TASK_ENABLE_USER_STATE:
+ {
+- enum amd_pm_state_type ps;
+ enum PP_StateUILabel requested_ui_label;
+ struct pp_power_state *requested_ps = NULL;
+
+- if (input == NULL) {
++ if (user_state == NULL) {
+ ret = -EINVAL;
+ break;
+ }
+- ps = *(unsigned long *)input;
+
+- requested_ui_label = power_state_convert(ps);
++ requested_ui_label = power_state_convert(*user_state);
+ ret = psm_set_user_performance_state(hwmgr, requested_ui_label, &requested_ps);
+ if (ret)
+ return ret;
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+index 565fe08..bd2889f 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+@@ -761,7 +761,7 @@ extern int hwmgr_hw_suspend(struct pp_instance *handle);
+ extern int hwmgr_hw_resume(struct pp_instance *handle);
+ extern int hwmgr_handle_task(struct pp_instance *handle,
+ enum amd_pp_task task_id,
+- void *input, void *output);
++ enum amd_pm_state_type *user_state);
+ extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index,
+ uint32_t value, uint32_t mask);
+
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-01 06:16:46 +0000