diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2988-drm-amd-pp-implement-phm_reset_power_profile_state.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2988-drm-amd-pp-implement-phm_reset_power_profile_state.patch | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2988-drm-amd-pp-implement-phm_reset_power_profile_state.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2988-drm-amd-pp-implement-phm_reset_power_profile_state.patch new file mode 100644 index 00000000..44100818 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2988-drm-amd-pp-implement-phm_reset_power_profile_state.patch @@ -0,0 +1,92 @@ +From 757e43229a2c7675a1f77211e74ccf5d5c0df0f9 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Mon, 18 Dec 2017 19:44:24 +0800 +Subject: [PATCH 2988/4131] drm/amd/pp: implement phm_reset_power_profile_state + +mv related code out of force_dpm_level to +phm_reset_power_profile_state + +Change-Id: I05401a7a15aa802274d311897b7b7b6a3e00f73a +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + .../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 33 ++++++++++++---------- + drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c | 1 + + .../gpu/drm/amd/powerplay/inc/hardwaremanager.h | 1 + + 3 files changed, 20 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +index 623cff9..2b0c53f 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +@@ -112,26 +112,29 @@ int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level + + PHM_FUNC_CHECK(hwmgr); + +- if (hwmgr->hwmgr_func->force_dpm_level != NULL) { ++ if (hwmgr->hwmgr_func->force_dpm_level != NULL) + ret = hwmgr->hwmgr_func->force_dpm_level(hwmgr, level); +- if (ret) +- return ret; +- +- if (hwmgr->hwmgr_func->set_power_profile_state) { +- if (hwmgr->current_power_profile == AMD_PP_GFX_PROFILE) +- ret = hwmgr->hwmgr_func->set_power_profile_state( +- hwmgr, +- &hwmgr->gfx_power_profile); +- else if (hwmgr->current_power_profile == AMD_PP_COMPUTE_PROFILE) +- ret = hwmgr->hwmgr_func->set_power_profile_state( +- hwmgr, +- &hwmgr->compute_power_profile); +- } +- } + + return ret; + } + ++int phm_reset_power_profile_state(struct pp_hwmgr *hwmgr) ++{ ++ int ret = 0; ++ ++ if (hwmgr->hwmgr_func->set_power_profile_state) { ++ if (hwmgr->current_power_profile == AMD_PP_GFX_PROFILE) ++ ret = hwmgr->hwmgr_func->set_power_profile_state( ++ hwmgr, ++ &hwmgr->gfx_power_profile); ++ else if (hwmgr->current_power_profile == AMD_PP_COMPUTE_PROFILE) ++ ret = hwmgr->hwmgr_func->set_power_profile_state( ++ hwmgr, ++ &hwmgr->compute_power_profile); ++ } ++ return ret; ++} ++ + int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, + struct pp_power_state *adjusted_ps, + const struct pp_power_state *current_ps) +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c +index ab852b2..f9ff409 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c +@@ -245,6 +245,7 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip, + + phm_notify_smc_display_config_after_ps_adjustment(hwmgr); + phm_force_dpm_levels(hwmgr, hwmgr->dpm_level); ++ phm_reset_power_profile_state(hwmgr); + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +index 57a0467..5716b93 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +@@ -437,5 +437,6 @@ extern int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr, + + extern int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks); + extern int phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr); ++extern int phm_reset_power_profile_state(struct pp_hwmgr *hwmgr); + #endif /* _HARDWARE_MANAGER_H_ */ + +-- +2.7.4 + |