diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2963-drm-amdgpu-setup-the-shared-and-private-apertures-on.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2963-drm-amdgpu-setup-the-shared-and-private-apertures-on.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2963-drm-amdgpu-setup-the-shared-and-private-apertures-on.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2963-drm-amdgpu-setup-the-shared-and-private-apertures-on.patch new file mode 100644 index 00000000..551e4769 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2963-drm-amdgpu-setup-the-shared-and-private-apertures-on.patch @@ -0,0 +1,68 @@ +From 0c0bedc1734815ddfee2f4584eedfbf31b6778e2 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Fri, 8 Dec 2017 15:09:20 -0500 +Subject: [PATCH 2963/4131] drm/amdgpu: setup the shared and private apertures + on gfx9 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Same as previous asics. This was not yet set for gfx9. + +Acked-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 17 ++++++++++++----- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 ++++++++ + 2 files changed, 20 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 0818f35..b9f9a36 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -1529,11 +1529,18 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev) + for (i = 0; i < 16; i++) { + soc15_grbm_select(adev, 0, 0, 0, i); + /* CP and shaders */ +- tmp = 0; +- tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, +- SH_MEM_ALIGNMENT_MODE_UNALIGNED); +- WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp); +- WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0); ++ if (i == 0) { ++ tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, ++ SH_MEM_ALIGNMENT_MODE_UNALIGNED); ++ WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp); ++ WREG32_SOC15(GC, 0, mmSH_MEM_BASES, 0); ++ } else { ++ tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, ++ SH_MEM_ALIGNMENT_MODE_UNALIGNED); ++ WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp); ++ tmp = adev->mc.shared_aperture_start >> 48; ++ WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp); ++ } + } + soc15_grbm_select(adev, 0, 0, 0, 0); + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 9083b30..5871379 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -499,6 +499,14 @@ static int gmc_v9_0_early_init(void *handle) + gmc_v9_0_set_gart_funcs(adev); + gmc_v9_0_set_irq_funcs(adev); + ++ adev->mc.shared_aperture_start = 0x2000000000000000ULL; ++ adev->mc.shared_aperture_end = ++ adev->mc.shared_aperture_start + (4ULL << 30) - 1; ++ adev->mc.private_aperture_start = ++ adev->mc.shared_aperture_end + 1; ++ adev->mc.private_aperture_end = ++ adev->mc.private_aperture_start + (4ULL << 30) - 1; ++ + return 0; + } + +-- +2.7.4 + |