diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2950-drm-amdgpu-drop-the-bios-scratch-reg-callbacks-from-.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2950-drm-amdgpu-drop-the-bios-scratch-reg-callbacks-from-.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2950-drm-amdgpu-drop-the-bios-scratch-reg-callbacks-from-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2950-drm-amdgpu-drop-the-bios-scratch-reg-callbacks-from-.patch new file mode 100644 index 00000000..bfdc04b0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2950-drm-amdgpu-drop-the-bios-scratch-reg-callbacks-from-.patch @@ -0,0 +1,101 @@ +From 0d83c6485d8af422fef0d59d3c5e6aa9ce52be46 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Fri, 8 Dec 2017 13:11:33 -0500 +Subject: [PATCH 2950/4131] drm/amdgpu: drop the bios scratch reg callbacks + from nbio +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +They are not used any longer. We get the scratch register +locations from the vbios directly now. + +Acked-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 --- + drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 14 -------------- + drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 14 -------------- + 3 files changed, 31 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index b63b695..81e019a 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1519,9 +1519,6 @@ struct amdgpu_nbio_funcs { + u32 (*get_pcie_index_offset)(struct amdgpu_device *adev); + u32 (*get_pcie_data_offset)(struct amdgpu_device *adev); + u32 (*get_rev_id)(struct amdgpu_device *adev); +- u32 (*get_atombios_scratch_regs)(struct amdgpu_device *adev, uint32_t idx); +- void (*set_atombios_scratch_regs)(struct amdgpu_device *adev, +- uint32_t idx, uint32_t val); + void (*mc_access_enable)(struct amdgpu_device *adev, bool enable); + void (*hdp_flush)(struct amdgpu_device *adev); + u32 (*get_memsize)(struct amdgpu_device *adev); +diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c +index 0d35148..d4da663d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c +@@ -43,18 +43,6 @@ static u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev) + return tmp; + } + +-static u32 nbio_v6_1_get_atombios_scratch_regs(struct amdgpu_device *adev, +- uint32_t idx) +-{ +- return RREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx); +-} +- +-static void nbio_v6_1_set_atombios_scratch_regs(struct amdgpu_device *adev, +- uint32_t idx, uint32_t val) +-{ +- WREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx, val); +-} +- + static void nbio_v6_1_mc_access_enable(struct amdgpu_device *adev, bool enable) + { + if (enable) +@@ -284,8 +272,6 @@ const struct amdgpu_nbio_funcs nbio_v6_1_funcs = { + .get_pcie_index_offset = nbio_v6_1_get_pcie_index_offset, + .get_pcie_data_offset = nbio_v6_1_get_pcie_data_offset, + .get_rev_id = nbio_v6_1_get_rev_id, +- .get_atombios_scratch_regs = nbio_v6_1_get_atombios_scratch_regs, +- .set_atombios_scratch_regs = nbio_v6_1_set_atombios_scratch_regs, + .mc_access_enable = nbio_v6_1_mc_access_enable, + .hdp_flush = nbio_v6_1_hdp_flush, + .get_memsize = nbio_v6_1_get_memsize, +diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c +index 29d7b4f..17a9131 100644 +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c +@@ -44,18 +44,6 @@ static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) + return tmp; + } + +-static u32 nbio_v7_0_get_atombios_scratch_regs(struct amdgpu_device *adev, +- uint32_t idx) +-{ +- return RREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx); +-} +- +-static void nbio_v7_0_set_atombios_scratch_regs(struct amdgpu_device *adev, +- uint32_t idx, uint32_t val) +-{ +- WREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx, val); +-} +- + static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) + { + if (enable) +@@ -279,8 +267,6 @@ const struct amdgpu_nbio_funcs nbio_v7_0_funcs = { + .get_pcie_index_offset = nbio_v7_0_get_pcie_index_offset, + .get_pcie_data_offset = nbio_v7_0_get_pcie_data_offset, + .get_rev_id = nbio_v7_0_get_rev_id, +- .get_atombios_scratch_regs = nbio_v7_0_get_atombios_scratch_regs, +- .set_atombios_scratch_regs = nbio_v7_0_set_atombios_scratch_regs, + .mc_access_enable = nbio_v7_0_mc_access_enable, + .hdp_flush = nbio_v7_0_hdp_flush, + .get_memsize = nbio_v7_0_get_memsize, +-- +2.7.4 + |