diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2808-drm-amd-display-use-num_timing_generator-instead-of-.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2808-drm-amd-display-use-num_timing_generator-instead-of-.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2808-drm-amd-display-use-num_timing_generator-instead-of-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2808-drm-amd-display-use-num_timing_generator-instead-of-.patch new file mode 100644 index 00000000..8a11c8b2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/2808-drm-amd-display-use-num_timing_generator-instead-of-.patch @@ -0,0 +1,32 @@ +From ce4d5e641dad2910daa00f2ea117b23e53e50cd5 Mon Sep 17 00:00:00 2001 +From: Ken Chalmers <ken.chalmers@amd.com> +Date: Thu, 2 Nov 2017 10:45:12 -0400 +Subject: [PATCH 2808/4131] drm/amd/display: use num_timing_generator instead + of pipe_count + +The two are not necessarily the same. + +Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index 76b68a2..8e2ddbc 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -154,7 +154,7 @@ void dcn10_log_hw_state(struct dc *dc) + DTN_INFO("OTG:\t v_bs \t v_be \t v_ss \t v_se \t vpol \t vmax \t vmin \t " + "h_bs \t h_be \t h_ss \t h_se \t hpol \t htot \t vtot \t underflow\n"); + +- for (i = 0; i < pool->pipe_count; i++) { ++ for (i = 0; i < pool->res_cap->num_timing_generator; i++) { + struct timing_generator *tg = pool->timing_generators[i]; + struct dcn_otg_state s = {0}; + +-- +2.7.4 + |